Apologies for any multiple copies received. We would appreciate it if you could distribute<br><div class="gmail_quote">the following call for papers to any relevant mailing lists you know of.<br><br> CALL FOR PAPERS<br>
============================================================================<br>Special Session: Design, Testing and Formal Verification Techniques for Integrated Circuits and Systems<br><br> DTVCS 2008<br>
<br> August 18-20, 2008 (Kailua-Kona, Hawaii, USA)<br> <a href="http://digilander.libero.it/systemcfl/dtvcs" target="_blank">http://digilander.libero.it/systemcfl/dtvcs</a><br>
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<br><br>Special Session in the IASTED International Conference on Circuits and Systems (CS 2008)<br>-------------------------------------------------------------------------------------------------------------------------------------<br>
The IASTED International Conference on Circuits and Systems (CS 2008) will take place in<br>Kailua-Kona, Hawaii, USA, August 18-20, 2008.<br>URL: <a href="http://www.iasted.org/conferences/cfp-625.html" target="_blank">http://www.iasted.org/conferences/cfp-625.html</a>.<br>
<br><br>Aims and Scope<br>-------------------------<br>The main target of the Special Session DTVCS is to bring together engineering researchers,<br>computer scientists, practitioners and people from industry to exchange theories, ideas,<br>
techniques and experiences related to the areas of design, testing and formal verification techniques<br>for integrated circuits and systems. Contributions on UML and formal paradigms based on process algebras,<br>petri-nets, automaton theory and BDDs in the context of design, testing and formal verification techniques<br>
for integrated circuits and systems are also encouraged.<br><br>Topics<br>----------<br>Topics of interest include, but are not limited to, the following:<br><br>* digital, analog, mixed-signal and RF test<br>* built-in self test<br>
* ATPG<br>* theory and foundations: model checking, SAT-based methods, use of PSL, compositional methods and probabilistic methods<br>* applications of formal methods: equivalence checking, CSP applications and transaction-level verification<br>
* verification through hybrid techniques<br>* verification methods based on hardware description/system-level languages (e.g. VHDL, SystemVerilog and SystemC)<br>* testing and verification applications: tools, industrial experience reports and case studies<br>
<br>Industrial Collaborators and Sponsors<br>------------------------------------------------------<br>This special session is partnered with:<br><br>* CEOL: Centre for Efficiency-Oriented Languages "Towards improved software timing",<br>
University College Cork, Ireland (<a href="http://www.ceol.ucc.ie" target="_blank">http://www.ceol.ucc.ie</a>)<br>* International Software and Productivity Engineering Institute, USA (<a href="http://www.intspei.com" target="_blank">http://www.intspei.com</a>)<br>
* Intelligent Support Ltd., United Kingdom (<a href="http://www.isupport-ltd.co.uk" target="_blank">http://www.isupport-ltd.co.uk</a>)<br>* Minteos, Italy (<a href="http://www.minteos.com" target="_blank">http://www.minteos.com</a>)<br>
* M.O.S.T., Italy (<a href="http://www.most.it" target="_blank">http://www.most.it</a>)<br>
* Electronic Center, Italy (<a href="http://www.el-center.com" target="_blank">http://www.el-center.com</a>)<br>* Legale Fiscale, Italy (<a href="http://www.legalefiscale.it" target="_blank">http://www.legalefiscale.it</a>)<br>
<br>This special session is sponsored by:<br>
<br>* LS Industrial Systems, South Korea (<a href="http://eng.lsis.biz" target="_blank">http://eng.lsis.biz</a>)<br>* Solari, Hong Kong (<a href="http://www.solari-hk.com/" target="_blank">http://www.solari-hk.com/</a>)<br>
<br>Technical Program Committee<br>
--------------------------------------------<br>* Prof. Vladimir Hahanov, Kharkov National University of Radio Electronics, Ukraine<br>* Prof. Paolo Prinetto, Politecnico di Torino, Italy<br>* Prof. Alberto Macii, Politecnico di Torino, Italy<br>
* Prof. Joongho Choi, University of Seoul, South Korea<br>* Prof. Wei Li, Fudan University, China<br>* Prof. Michel Schellekens, University College Cork, Ireland<br>* Prof. Franco Fummi, University of Verona, Italy<br>* Prof. Jun-Dong Cho, Sung Kyun Kwan University, South Korea<br>
* Prof. AHM Zahirul Alam, International Islamic University Malaysia, Malaysia<br>* Dr. Emanuel Popovici, University College Cork, Ireland<br>* Dr. Jong-Kug Seon, System LSI Lab., LS Industrial Systems Co. Ltd., South Korea<br>
* Dr. Umberto Rossi, STMicroelectronics, Italy<br>* Dr. Graziano Pravadelli, University of Verona, Italy<br>* Dr. Vladimir Pavlov, International Software and Productivity Engineering Institute, USA<br>* Dr. Jinfeng Huang, Philips & LiteOn Digital Solutions Netherlands, Advanced Research Centre,<br>
The Netherlands<br>* Dr. Thierry Vallee, Georgia Southern University, Statesboro, Georgia, USA<br>* Dr. Menouer Boubekeur, University College Cork, Ireland<br>* Dr. Ana Sokolova, University of Salzburg, Austria<br>
* Dr. Sergio Almerares, STMicroelectronics, Italy<br>* Ajay Patel (Director), Intelligent Support Ltd, United Kingdom<br>* Monica Donno (Director), Minteos, Italy<br>* Alessandro Carlo (Manager), Research and Development Centre of FIAT, Italy<br>
* Yui Fai Lam (Manager), Microsystems Packaging Institute, Hong Kong University of<br> Science and Technology, Hong Kong<br><br>Important Dates<br>---------------------------<br>April 1, 2008: Deadline for submission of completed papers<br>
May 15, 2008: Notification of acceptance/rejection to authors<br><br>Please visit our web-site for further information on the hosting conference of DTVCS,<br>submission guidelines, proceedings and publications.<br><br>Best regards,<br>
<br>General Chair of DTVCS: Dr. K.L. Man (University College Cork, Ireland)<br>and<br>Organising Chairs: Miss Maria O'Keeffe (University College Cork, Ireland)<br> and: Mr. Michele Mercaldi (M.O.S.T., Italy)<br>
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