Final CFP: 2015 Workshop on Exascale Multi/many Core Computing Systems (E-MuCoCoS) (fwd)
This showed up in python-list, of all places, apparantly posted to comp.lang.python In case somebody wants to go to Portugal in September. Note: I am still a little hazy on what Exascale means, and therefore if we do it. :) Laura ------- Forwarded Message From: SP <sabri.pllana@gmail.com> Injection-Date: Tue, 23 Jun 2015 09:51:23 +0000 To: python-list@python.org CALL FOR PAPERS 2015 Workshop on Exascale Multi/many Core Computing Systems (E-MuCoCoS) - - Paper submission deadline: June 30, 2015 (firm deadline) - - Workshop proceedings are published by the IEEE * CONTEXT Exascale computing will revolutionize computational science and engineering by providing 1000x the capabilities of currently available computing systems, while having a similar power footprint. The HPC community is working towards the development of the first Exaflop computer (expected around 2020) after reaching the Petaflop milestone in 2008. There are concerns that computer designs based on existing multi-core and many-core solutions will not scale to Exascale considering technical challenges (such as, productivity, energy consumption or reliability) and reasonable economic constraints. Therefore, novel multi-core and many-core solutions are required to reach Exascale. E-MuCoCoS will be organized in conjunction with the 18th IEEE Conference on Computational Science and Engineering (CSE 2015), Porto, Portugal, October 21 - 23, 2015. Previous editions of MuCoCoS workshop include: MuCoCoS 2014 (Porto, PT), MuCoCoS 2013 (Edinburgh, UK), MuCoCoS 2012 (SLC, US), MuCoCoS 2011 (Seoul, KR), MuCoCoS 2010 (Krakow, PL), MuCoCoS 2009 (Fukuoka, JP), MuCoCoS 2008 (Barcelona, ES). * TOPICS OF INTEREST E-MuCoCoS focuses on multi/many core languages, system software and architectural solutions towards Exascale computing systems. The topics of the workshop include but are not limited to: :: Methods and tools for preparing applications for Exascale :: Programming models, languages, libraries and compilation techniques :: Run-time systems and hardware support :: Patterns, algorithms and data structures :: Performance analysis, modeling, optimization and tuning * SUBMISSION GUIDELINES - - The papers should be prepared using the IEEE format, and no longer than 6 pages. Submitted papers will be carefully evaluated based on originality, significance to workshop topics, technical soundness, and presentation quality. - - Submission of the paper implies that should the paper be accepted, at least one of the authors will register and present the paper at the workshop. - - Please submit your paper (as PDF) electronically using the online submission system https://easychair.org/conferences/?conf=emucocos2015 * IMPORTANT DATES - - Submission: June 30, 2015 (firm deadline) - - Notification: July 28, 2015 - - Camera ready: September 4, 2015 - - Registration: September 4, 2015 - - Workshop: October 20, 2015 * PROGRAM COMMITTEE - - Erika Abraham, RWTH Aachen University (DE) - - Siegfried Benkner, University of Vienna (AT) - - Eduardo Cesar, UAB (ES) - - Jiri Dokulil, University of Vienna, (AT) - - Norbert Eicker, J�lich Supercomputing Centre (DE) - - Franz Franchetti, Carnegie Mellon University (US) - - Samir Genaim, Universidad Complutense de Madrid (ES) - - Houcine Hassan, Universitat Politecnica de Valencia, (ES) - - Atsushi Hori, RIKEN AICS (JP) - - Einar Broch Johnsen, University of Oslo, (NO) - - Christos Kartsaklis, Oak Ridge National Laboratory (US) - - J�rg Keller, FernUniversit�t in Hagen (DE) - - Christoph Kessler, Link�ping University (SE) - - Joanna Kolodziej, Cracow University of Technology (PL) - - Ivan Kondov, Karlsruhe Institute of Technology (DE) - - Erwin Laure, KTH/PDC (SE) - - Renato Miceli, SENAI CIMATEC (BR) - - Lasse Natvig, Norwegian University of Science and Technology (NO) - - Dana Petcu, West University of Timisoara (RO) - - Uwe Schwiegelshohn, TU Dortmund University (DE) - - Achim Streit, Karlsruhe Institute for Technology (DE) - - Osamu Tatebe, University of Tsukuba, (JP) - - Josef Weidendorfer, TUM (DE) * WORKSHOP CHAIR - - Sabri Pllana, Linnaeus University, Sweden http://homepage.lnu.se/staff/saplaa/ - -- https://mail.python.org/mailman/listinfo/python-list ------- End of Forwarded Message
Exascale (super)computers are aiming for a performance target that exceeds 1 exaFLOPS, or 10**18 floating point ops per second. In the US this goal usually comes associated with a power requirement as well, I think last I heard the power goal was a cap of 20 megawatts (as proposed by the Dept. of Energy). Achieving exascale compute performance in a 20MW power envelope is impossible to achieve with conventional CPU architectures, so the challenges here are all about making compute/data transfer more efficient, effectively mapping computations to these large systems, etc. An interesting but slightly old paper with NVIDIA Research's perspective on the problem and their proposal to tackle it can be found here: - http://www.cs.nyu.edu/courses/spring12/CSCI-GA.3033-012/ieee-micro-echelon.p... In the US, a number of interesting companies are working on exascale research: - https://asc.llnl.gov/fastforward/index.php On Tue, Jun 23, 2015 at 7:53 AM, Laura Creighton <lac@openend.se> wrote:
Hi Laura, On Tuesday 2015-06-23 13:53, Laura Creighton wrote:
Note: I am still a little hazy on what Exascale means, and therefore if we do it. :)
technically, I work on both: Cori (>28 petaflops) and cppyy for PyPy. Intermittently anyway; time is always limited ... But unless Python is the driver only, it won't do much good as any current design requires multi-threading as well as multi-processing, so the GIL is a domper. Best regards, Wim -- WLavrijsen@lbl.gov -- +1 (510) 486 6411 -- www.lavrijsen.net
Exascale (super)computers are aiming for a performance target that exceeds 1 exaFLOPS, or 10**18 floating point ops per second. In the US this goal usually comes associated with a power requirement as well, I think last I heard the power goal was a cap of 20 megawatts (as proposed by the Dept. of Energy). Achieving exascale compute performance in a 20MW power envelope is impossible to achieve with conventional CPU architectures, so the challenges here are all about making compute/data transfer more efficient, effectively mapping computations to these large systems, etc. An interesting but slightly old paper with NVIDIA Research's perspective on the problem and their proposal to tackle it can be found here: - http://www.cs.nyu.edu/courses/spring12/CSCI-GA.3033-012/ieee-micro-echelon.p... In the US, a number of interesting companies are working on exascale research: - https://asc.llnl.gov/fastforward/index.php On Tue, Jun 23, 2015 at 7:53 AM, Laura Creighton <lac@openend.se> wrote:
Hi Laura, On Tuesday 2015-06-23 13:53, Laura Creighton wrote:
Note: I am still a little hazy on what Exascale means, and therefore if we do it. :)
technically, I work on both: Cori (>28 petaflops) and cppyy for PyPy. Intermittently anyway; time is always limited ... But unless Python is the driver only, it won't do much good as any current design requires multi-threading as well as multi-processing, so the GIL is a domper. Best regards, Wim -- WLavrijsen@lbl.gov -- +1 (510) 486 6411 -- www.lavrijsen.net
participants (3)
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Derek Lockhart -
Laura Creighton -
wlavrijsen＠lbl.gov