[Thomas Wouters]
Why ? Bumping register size doesn't mean Intel expects to use it all as address space. They could be used for video-processing,
Bingo. Common wisdom holds that vector machines are dead, but the truth is virtually *everyone* runs on a vector box now: Intel just renamed "vector" to "multimedia" (or AMD to "3D Now!"), and adopted a feeble (but ever-growing) subset of traditional vector machines' instruction sets.
or to represent a modest range of rationals <wink>, or to help core 'net routers deal with those nasty IPv6 addresses.
KSR's founders had in mind bit-level addressability of networks of machines spanning the globe. Were he to press the point, though, I'd have to agree with Eric that they didn't really *need* 128 bits for that modest goal.
I'm sure cryptomunchers would like bigger registers as well.
Agencies we can't talk about would like them as big as they can get them. Each vector register in a Cray box actually consisted of 64 64-bit words, or 4K bits per register. Some "special" models were constructed where the vector FPU was thrown away and additional bit-fiddling units added in its place: they really treated the vector registers as giant bitstrings, and didn't want to burn 64 clock cycles just to do, e.g., "one" conceptual xor.
Oh wait... I get it! You were trying to get yourself in the historybooks as the guy that said "64 bits ought to be enough for everyone" :-)
That would be foolish indeed! 128, though, now *that's* surely enough for at least a decade <wink>.