The re module increments a counter on each iteration and checks for signals when the bottom 12 bits are 0.
The regex module increments a 16-bit counter on each iteration and checks for signals when it wraps around to 0.
Then I'd say that's a great solution, except that `regex` probably over-exaggerates the overhead of checking for signals, and that `re` module for some strange reason wants to make an additional bitwise and.