[BangPypers] One python question (from verilog)

[Vishal]

In our company we use Python a lot to interact with hardware directly.
And as pointed out earlier, there is a C++ framework to read a register,
which is available as a COM library, and then Python interacts with this
library.
unfortunately, its proprietary and cannot be shared. But the idea itself is
open.

Vishal

On Sat, Sep 20, 2008 at 7:33 AM, Deepak Patel <patel.deepak.09 at gmail.com>wrote:

> Anand,
> Thanks. I am sure that this C like operation should work, I have not yet
> checked it though.
> Deepak
>
> On Fri, Sep 19, 2008 at 6:47 PM, Anand Chitipothu <anandology at gmail.com>wrote:
>
>>  On Sat, Sep 20, 2008 at 4:32 AM, Deepak Patel <patel.deepak.09 at gmail.com>
>> wrote:
>> > Hello all,
>> >
>> > I want to a write a method in Python to poll a register for '1' or '0'.
>> It
>> > is kind of very simple in verilog, but not sure if python provides
>> > flexibility or not.
>> >
>> > My algorithm (kind of Verilog syntax where I can access the bits without
>> any
>> > extra processing) is as follows:
>> >
>> > poll_reg ( input bit_pos, input poll_val, reg_offset)
>> > {
>> > // In this bit_pos is the position of bit in my register read which are
>> > being polled to become poll_val. Poll_val can be either 0 or 1.
>> >
>> >           matched = 0;
>> >           while (matched != 1)
>> >           begin
>> >                   read_data = read_reg(reg_offset);
>> >                   if (read_data[bit_pos] == poll_val)
>> >                   begin
>> >                             matched = 1;
>> >                    end
>> >                    else
>> >                    begin
>> >                              matched = 0;
>> >                    end
>> >              end
>> > }
>>
>> This is more C-like bit operation. You need to get a mask by right
>> shiting 1 by bit_pos and do binary AND with the register value.
>>
>> def poll_reg(bit_pos, poll_val, reg_offset):
>>   mask = 1 <<  bit_pos
>>   while read_read(reg_offset) & mask == poll_val:
>>       continue
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>
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