[Cython] OpenCL support
dtcaciuc at gmail.com
Wed Feb 8 18:35:52 CET 2012
On Wed, Feb 8, 2012 at 6:46 AM, Dag Sverre Seljebotn
<d.s.seljebotn at astro.uio.no> wrote:
> On 02/05/2012 10:57 PM, mark florisson wrote:
> I don't really know how good the Intel and AMD CPU drivers are w.r.t. this
> -- I have seen the Intel driver emit "vectorizing" and "could not
> vectorize", but didn't explore the circumstances.
For our project, we've tried both Intel and AMD (previously ATI)
backends. The AMD experience somewhat mirrors what this developer
although not as bad in terms of silent failures (or maybe I just
havent caught any!).
Intel backend was great and clearly better in terms of performance,
sometimes by about 20-30%. However, when ran on older AMD-based
machine as opposed to Intel one, the resulting kernel simply
segfaulted without any warning about an unsupported architecture (I
think its because it didn't have SSE3 support).
> Dag Sverre
> cython-devel mailing list
> cython-devel at python.org
I know Intel is working with LLVM/Clang folks to introduce their
vectorization additions, at least to some degree, and LLVM seems to be
consistently improving in this regard (eg
http://blog.llvm.org/2011/12/llvm-31-vector-changes.html). I suppose
if Cython emitted vectorization-friendly numerical loops, then
appropriate C/C++ compiler should take care of this automatically, if
used. Intel C++ can already do certain stuff like that (see
and GCC as well AFAIK.
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