[Numpy-discussion] Solaris Sparc build broken

Charles R Harris charlesr.harris at gmail.com
Wed Nov 4 14:47:24 EST 2009

On Wed, Nov 4, 2009 at 12:38 PM, Charles R Harris <charlesr.harris at gmail.com
> wrote:

> On Wed, Nov 4, 2009 at 12:35 PM, Charles R Harris <
> charlesr.harris at gmail.com> wrote:
>> On Wed, Nov 4, 2009 at 12:11 PM, David Cournapeau <cournape at gmail.com>wrote:
>>> On Thu, Nov 5, 2009 at 2:15 AM, Michael Droettboom <mdroe at stsci.edu>
>>> wrote:
>>> > I'm getting the following from r7603 on Solaris Sparc -- somehow
>>> related
>>> > to not having a long double version of next after available.  I realise
>>> > not everyone has access to (or is dependent on) this platform, so I'm
>>> > willing to help in whatever way I can, I'm just not sure I understand
>>> > the change yet.
>>> The only way to implement nextafter that I know of requires to know
>>> the exact representation of the floating point number, and long double
>>> is unfortunately platform dependent.
>>> What is the long double format on solaris sparc ? (big endian I
>>> suppose, but how many bits for the mantissa and  exponent ? Does it
>>> follow IEER754 ?)
>> Long double on SPARC is quad precision, which I believe *is* in one of the
>> ieee specs. In any case, it has a lot more precision than the extended
>> precision found in Intel derived architectures. Hmm, I wonder what ia64
>> does?
> HP9000 also has quad precision:
> http://docs.hp.com/en/B3906-90006/ch02s02.html
And it looks like extended precision has disappeared from the latest version
or the ieee_754-2008 <http://wapedia.mobi/en/IEEE_754-2008>standard, being
replaced by quad precision. I know Intel is also working on quad precision
FPU's, so I think that is where things are heading.

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