[pypy-svn] r62900 - pypy/branch/pyjitpl5/pypy/jit/backend/x86

fijal at codespeak.net fijal at codespeak.net
Thu Mar 12 19:01:23 CET 2009


Author: fijal
Date: Thu Mar 12 19:01:23 2009
New Revision: 62900

Modified:
   pypy/branch/pyjitpl5/pypy/jit/backend/x86/assembler.py
   pypy/branch/pyjitpl5/pypy/jit/backend/x86/regalloc.py
Log:
int_mod_ovf and friends


Modified: pypy/branch/pyjitpl5/pypy/jit/backend/x86/assembler.py
==============================================================================
--- pypy/branch/pyjitpl5/pypy/jit/backend/x86/assembler.py	(original)
+++ pypy/branch/pyjitpl5/pypy/jit/backend/x86/assembler.py	Thu Mar 12 19:01:23 2009
@@ -219,9 +219,13 @@
             getattr(self.mc, asmop)(arglocs[0], arglocs[1])
         return genop_binary
 
-    def _binaryop_ovf(asmop, can_swap=False):
+    def _binaryop_ovf(asmop, can_swap=False, is_mod=False):
         def genop_binary_ovf(self, op, guard_op, arglocs, result_loc):
-            getattr(self.mc, asmop)(arglocs[0], arglocs[1])
+            if is_mod:
+                self.mc.CDQ()
+                self.mc.IDIV(ecx)
+            else:
+                getattr(self.mc, asmop)(arglocs[0], arglocs[1])
             index = self.cpu.make_guard_index(guard_op)
             recovery_code_addr = self.mc2.tell()
             stacklocs = guard_op.stacklocs
@@ -271,6 +275,8 @@
     genop_int_sub = _binaryop("SUB")
     genop_int_mul = _binaryop("IMUL", True)
     genop_int_and = _binaryop("AND", True)
+    genop_int_or  = _binaryop("OR", True)
+    genop_int_xor = _binaryop("XOR", True)
 
     genop_uint_add = genop_int_add
     genop_uint_sub = genop_int_sub
@@ -280,6 +286,7 @@
     genop_int_mul_ovf = _binaryop_ovf("IMUL", True)
     genop_int_sub_ovf = _binaryop_ovf("SUB")
     genop_int_add_ovf = _binaryop_ovf("ADD", True)
+    genop_int_mod_ovf = _binaryop_ovf("IDIV", is_mod=True)
 
     genop_int_lt = _cmpop("L", "G")
     genop_int_le = _cmpop("LE", "GE")

Modified: pypy/branch/pyjitpl5/pypy/jit/backend/x86/regalloc.py
==============================================================================
--- pypy/branch/pyjitpl5/pypy/jit/backend/x86/regalloc.py	(original)
+++ pypy/branch/pyjitpl5/pypy/jit/backend/x86/regalloc.py	Thu Mar 12 19:01:23 2009
@@ -611,6 +611,8 @@
     consider_int_mul = _consider_binop
     consider_int_sub = _consider_binop
     consider_int_and = _consider_binop
+    consider_int_or  = _consider_binop
+    consider_int_xor = _consider_binop
     consider_uint_add = _consider_binop
     consider_uint_mul = _consider_binop
     consider_uint_sub = _consider_binop
@@ -653,6 +655,19 @@
         self.eventually_free_vars(op.args + [tmpvar])
         return ops0 + ops1 + ops2 + ops3 + [Perform(op, [eax, ecx], edx)]
 
+    def consider_int_mod_ovf(self, op, guard_op):
+        l0, ops0 = self.make_sure_var_in_reg(op.args[0], [], eax)
+        l1, ops1 = self.make_sure_var_in_reg(op.args[1], [], ecx)
+        l2, ops2 = self.force_allocate_reg(op.result, [], edx)
+        tmpvar = TempBox()
+        _, ops3 = self.force_allocate_reg(tmpvar, [], eax)
+        assert (l0, l1, l2) == (eax, ecx, edx)
+        locs = self._locs_from_liveboxes(guard_op)
+        self.eventually_free_vars(guard_op.liveboxes)
+        self.eventually_free_vars(op.args + [tmpvar])
+        return (ops0 + ops1 + ops2 + ops3 +
+                [PerformWithGuard(op, guard_op, [eax, ecx] + locs, edx)])
+
     def consider_int_floordiv(self, op, ignored):
         tmpvar = TempBox()
         l0, ops0 = self.force_result_in_reg(op.result, op.args[0], [], eax)



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