[pypy-svn] r69657 - in pypy/branch/virtual-forcing/pypy/jit/backend/llsupport: . test

fijal at codespeak.net fijal at codespeak.net
Thu Nov 26 16:49:39 CET 2009


Author: fijal
Date: Thu Nov 26 16:49:39 2009
New Revision: 69657

Modified:
   pypy/branch/virtual-forcing/pypy/jit/backend/llsupport/regalloc.py
   pypy/branch/virtual-forcing/pypy/jit/backend/llsupport/test/test_regalloc.py
Log:
support for saving all registers


Modified: pypy/branch/virtual-forcing/pypy/jit/backend/llsupport/regalloc.py
==============================================================================
--- pypy/branch/virtual-forcing/pypy/jit/backend/llsupport/regalloc.py	(original)
+++ pypy/branch/virtual-forcing/pypy/jit/backend/llsupport/regalloc.py	Thu Nov 26 16:49:39 2009
@@ -304,7 +304,7 @@
             self.assembler.regalloc_mov(reg, to)
         # otherwise it's clean
 
-    def before_call(self, force_store=[]):
+    def before_call(self, force_store=[], save_all_regs=False):
         """ Spill registers before a call, as described by
         'self.save_around_call_regs'.  Registers are not spilled if
         they don't survive past the current operation, unless they
@@ -316,8 +316,8 @@
                 del self.reg_bindings[v]
                 self.free_regs.append(reg)
                 continue
-            if reg not in self.save_around_call_regs:
-                # we don't need to
+            if not save_all_regs and reg not in self.save_around_call_regs:
+                # we don't have to
                 continue
             self._sync_var(v)
             del self.reg_bindings[v]

Modified: pypy/branch/virtual-forcing/pypy/jit/backend/llsupport/test/test_regalloc.py
==============================================================================
--- pypy/branch/virtual-forcing/pypy/jit/backend/llsupport/test/test_regalloc.py	(original)
+++ pypy/branch/virtual-forcing/pypy/jit/backend/llsupport/test/test_regalloc.py	Thu Nov 26 16:49:39 2009
@@ -278,6 +278,30 @@
         assert len(rm.reg_bindings) == 3
         rm._check_invariants()
 
+    def test_call_support_save_all_regs(self):
+        class XRegisterManager(RegisterManager):
+            save_around_call_regs = [r1, r2]
+
+            def call_result_location(self, v):
+                return r1
+
+        sm = TStackManager()
+        asm = MockAsm()
+        boxes, longevity = boxes_and_longevity(5)
+        rm = XRegisterManager(longevity, stack_manager=sm,
+                              assembler=asm)
+        for b in boxes[:-1]:
+            rm.force_allocate_reg(b)
+        rm.before_call(save_all_regs=True)
+        assert len(rm.reg_bindings) == 0
+        assert sm.stack_depth == 4
+        assert len(asm.moves) == 4
+        rm._check_invariants()
+        rm.after_call(boxes[-1])
+        assert len(rm.reg_bindings) == 1
+        rm._check_invariants()
+        
+
     def test_different_stack_width(self):
         class XRegisterManager(RegisterManager):
             reg_width = 2



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