[pypy-svn] r79758 - pypy/branch/arm-backend/pypy/jit/backend/arm

david at codespeak.net david at codespeak.net
Thu Dec 2 18:40:32 CET 2010


Author: david
Date: Thu Dec  2 18:40:30 2010
New Revision: 79758

Modified:
   pypy/branch/arm-backend/pypy/jit/backend/arm/assembler.py
   pypy/branch/arm-backend/pypy/jit/backend/arm/opassembler.py
Log:
Reduce the number of instructions used for guards

Modified: pypy/branch/arm-backend/pypy/jit/backend/arm/assembler.py
==============================================================================
--- pypy/branch/arm-backend/pypy/jit/backend/arm/assembler.py	(original)
+++ pypy/branch/arm-backend/pypy/jit/backend/arm/assembler.py	Thu Dec  2 18:40:30 2010
@@ -1,7 +1,7 @@
 from pypy.jit.backend.arm import conditions as c
 from pypy.jit.backend.arm import locations
 from pypy.jit.backend.arm import registers as r
-from pypy.jit.backend.arm.arch import WORD, FUNC_ALIGN
+from pypy.jit.backend.arm.arch import WORD, FUNC_ALIGN, PC_OFFSET
 from pypy.jit.backend.arm.codebuilder import ARMv7Builder, ARMv7InMemoryBuilder
 from pypy.jit.backend.arm.regalloc import ARMRegisterManager, ARMFrameManager
 from pypy.jit.backend.llsupport.regalloc import compute_vars_longevity, TempBox
@@ -243,9 +243,10 @@
 
         n = self.cpu.get_fail_descr_number(descr)
         self.encode32(mem, j+1, n)
-        self.mc.ensure_can_fit(self.mc.size_of_gen_load_int)
-        self.mc.gen_load_int(r.lr.value, memaddr, cond=fcond) # use lr to pass an argument
+        self.mc.ensure_can_fit(4*WORD)
+        self.mc.LDR_ri(r.lr.value, r.pc.value, imm=WORD)
         self.mc.B(self._exit_code_addr)
+        self.mc.write32(memaddr)
 
         return memaddr
 

Modified: pypy/branch/arm-backend/pypy/jit/backend/arm/opassembler.py
==============================================================================
--- pypy/branch/arm-backend/pypy/jit/backend/arm/opassembler.py	(original)
+++ pypy/branch/arm-backend/pypy/jit/backend/arm/opassembler.py	Thu Dec  2 18:40:30 2010
@@ -181,15 +181,15 @@
 
     _mixin_ = True
 
-    guard_size = ARMv7Builder.size_of_gen_load_int + 6*WORD
+    guard_size = 10*WORD
     def _emit_guard(self, op, regalloc, fcond, save_exc=False):
         descr = op.getdescr()
         assert isinstance(descr, AbstractFailDescr)
-        #if hasattr(op, 'getfailargs'):
-        #   print 'Failargs: ', op.getfailargs()
+        if hasattr(op, 'getfailargs'):
+           print 'Failargs: ', op.getfailargs()
 
         self.mc.ensure_can_fit(self.guard_size)
-        self.mc.ADD_ri(r.pc.value, r.pc.value, self.guard_size, cond=fcond)
+        self.mc.ADD_ri(r.pc.value, r.pc.value, self.guard_size-PC_OFFSET, cond=fcond)
         descr._arm_guard_code = self.mc.curraddr()
 
         self.mc.PUSH([reg.value for reg in r.caller_resp])
@@ -200,7 +200,6 @@
         memaddr = self._gen_path_to_exit_path(op, op.getfailargs(), regalloc)
         descr._failure_recovery_code = memaddr
         regalloc.possibly_free_vars_for_op(op)
-        self.mc.NOP()
         return c.AL
 
     def emit_op_guard_true(self, op, regalloc, fcond):



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