[pypy-svn] r79784 - pypy/branch/arm-backend/pypy/jit/backend/arm/helper

[david at codespeak.net]

Author: david
Date: Fri Dec  3 17:29:17 2010
New Revision: 79784

Modified:
   pypy/branch/arm-backend/pypy/jit/backend/arm/helper/assembler.py
Log:
Fix comparison ops based on random test results

Modified: pypy/branch/arm-backend/pypy/jit/backend/arm/helper/assembler.py
==============================================================================
--- pypy/branch/arm-backend/pypy/jit/backend/arm/helper/assembler.py	(original)
+++ pypy/branch/arm-backend/pypy/jit/backend/arm/helper/assembler.py	Fri Dec  3 17:29:17 2010
@@ -45,7 +45,7 @@
         regalloc.possibly_free_var(op.result)
 
         if l1.is_imm():
-            ri_op(self.mc, res.value, l0.value, imm=l1.getint(), cond=fcond)
+            ri_op(self.mc, res.value, l0.value, imm=l1.value, cond=fcond)
         else:
             rr_op(self.mc, res.value, l0.value, l1.value)
         return fcond
@@ -74,30 +74,32 @@
 def gen_emit_cmp_op(condition, inverse=False):
     def f(self, op, regalloc, fcond):
         assert fcond is not None
-        args = op.getarglist()
+        boxes = list(op.getarglist())
         if not inverse:
-            arg0 = op.getarg(0)
-            arg1 = op.getarg(1)
+            arg0, arg1 = boxes
         else:
-            arg0 = op.getarg(1)
-            arg1 = op.getarg(0)
+            arg1, arg0 = boxes
         # XXX consider swapping argumentes if arg0 is const
         imm_a0 = self._check_imm_arg(arg0)
         imm_a1 = self._check_imm_arg(arg1)
+
+        l0, box = self._ensure_value_is_boxed(arg0, regalloc, forbidden_vars=boxes)
+        boxes.append(box)
         if imm_a1 and not imm_a0:
-            l0 = regalloc.make_sure_var_in_reg(arg0, args, imm_fine=False)
-            l1 = regalloc.make_sure_var_in_reg(arg1, args)
-            res = regalloc.force_allocate_reg(op.result)
-            self.mc.CMP_ri(l0.value, imm=l1.getint(), cond=fcond)
+            l1 = regalloc.make_sure_var_in_reg(arg1, boxes)
         else:
-            l0 = regalloc.make_sure_var_in_reg(arg0, args, imm_fine=False)
-            l1 = regalloc.make_sure_var_in_reg(arg1, args, imm_fine=False)
-            res = regalloc.force_allocate_reg(op.result)
-            self.mc.CMP_rr(l0.value, l1.value, cond=fcond)
+            l1, box = self._ensure_value_is_boxed(arg1, regalloc, forbidden_vars=boxes)
+            boxes.append(box)
+        res = regalloc.force_allocate_reg(op.result)
+        regalloc.possibly_free_vars(boxes)
+        regalloc.possibly_free_var(op.result)
 
         inv = c.get_opposite_of(condition)
+        if l1.is_imm():
+            self.mc.CMP_ri(l0.value, imm=l1.getint(), cond=fcond)
+        else:
+            self.mc.CMP_rr(l0.value, l1.value, cond=fcond)
         self.mc.MOV_ri(res.value, 1, cond=condition)
         self.mc.MOV_ri(res.value, 0, cond=inv)
-        regalloc.possibly_free_vars([arg0, arg1, op.result])
         return fcond
     return f