[pypy-svn] r78719 - in pypy/branch/arm-backend/pypy/jit/backend/arm: . test

[david at codespeak.net]

Author: david
Date: Fri Nov  5 11:01:20 2010
New Revision: 78719

Modified:
   pypy/branch/arm-backend/pypy/jit/backend/arm/assembler.py
   pypy/branch/arm-backend/pypy/jit/backend/arm/codebuilder.py
   pypy/branch/arm-backend/pypy/jit/backend/arm/opassembler.py
   pypy/branch/arm-backend/pypy/jit/backend/arm/test/test_assembler.py
   pypy/branch/arm-backend/pypy/jit/backend/arm/test/test_instr_codebuilder.py
Log:
Implement POP instruction

Modified: pypy/branch/arm-backend/pypy/jit/backend/arm/assembler.py
==============================================================================
--- pypy/branch/arm-backend/pypy/jit/backend/arm/assembler.py	(original)
+++ pypy/branch/arm-backend/pypy/jit/backend/arm/assembler.py	Fri Nov  5 11:01:20 2010
@@ -108,7 +108,7 @@
 
         self.mc.BL(rffi.cast(lltype.Signed, decode_registers_addr))
         self.mc.MOV_rr(r.ip.value, r.r0.value)
-        self.mc.LDM(r.sp.value, [reg.value for reg in r.all_regs], w=1) # XXX Replace with POP instr. someday
+        self.mc.POP([reg.value for reg in r.all_regs])
         self.mc.MOV_rr(r.r0.value, r.ip.value)
         self.gen_func_epilog()
 
@@ -169,7 +169,7 @@
     epilog_size = 2*WORD
     def gen_func_epilog(self,cond=c.AL):
         self.mc.MOV_rr(r.sp.value, r.fp.value)
-        self.mc.LDM(r.sp.value, [reg.value for reg in r.callee_restored_registers], cond=cond, w=1)
+        self.mc.POP([reg.value for reg in r.callee_restored_registers], cond=cond)
 
     def gen_func_prolog(self):
         self.mc.PUSH([reg.value for reg in r.callee_saved_registers])

Modified: pypy/branch/arm-backend/pypy/jit/backend/arm/codebuilder.py
==============================================================================
--- pypy/branch/arm-backend/pypy/jit/backend/arm/codebuilder.py	(original)
+++ pypy/branch/arm-backend/pypy/jit/backend/arm/codebuilder.py	Fri Nov  5 11:01:20 2010
@@ -21,7 +21,7 @@
         else:
             self.PUSH(range(2, 4), cond=c)
             self.BL(addr, cond=c, some_reg=reg.r2)
-            self.LDM(reg.sp.value, range(2, 4), w=1, cond=c) # XXX Replace with POP instr. someday
+            self.POP(range(2,4), cond=c)
     return f
 
 class AbstractARMv7Builder(object):
@@ -40,10 +40,15 @@
         raise NotImplentedError
 
     def PUSH(self, regs, cond=cond.AL):
-        assert reg.sp not in regs
+        assert reg.sp.value not in regs
         instr = self._encode_reg_list(cond << 28 | 0x92D << 16, regs)
         self.write32(instr)
 
+    def POP(self, regs, cond=cond.AL):
+        assert reg.lr.value not in regs
+        instr = self._encode_reg_list(cond << 28 | 0x8BD << 16, regs)
+        self.write32(instr)
+
     def LDM(self, rn, regs, w=0, cond=cond.AL):
         instr = cond << 28 | 0x89 << 20 | w << 21 | (rn & 0xFF) << 16
         instr = self._encode_reg_list(instr, regs)

Modified: pypy/branch/arm-backend/pypy/jit/backend/arm/opassembler.py
==============================================================================
--- pypy/branch/arm-backend/pypy/jit/backend/arm/opassembler.py	(original)
+++ pypy/branch/arm-backend/pypy/jit/backend/arm/opassembler.py	Fri Nov  5 11:01:20 2010
@@ -208,6 +208,7 @@
                 regalloc.possibly_free_var(reg)
 
         adr = self.cpu.cast_adr_to_int(op.getarg(0).getint())
+        # XXX use PUSH here instead of spilling every reg for itself
         regalloc.before_call()
 
         reg_args = min(op.numargs()-1, 4)

Modified: pypy/branch/arm-backend/pypy/jit/backend/arm/test/test_assembler.py
==============================================================================
--- pypy/branch/arm-backend/pypy/jit/backend/arm/test/test_assembler.py	(original)
+++ pypy/branch/arm-backend/pypy/jit/backend/arm/test/test_assembler.py	Fri Nov  5 11:01:20 2010
@@ -139,7 +139,7 @@
         self.a.mc.PUSH(range(2, 12))
         div_addr = rffi.cast(lltype.Signed, llhelper(arm_int_div_sign, arm_int_div))
         self.a.mc.BL(div_addr, some_reg=r.r2)
-        self.a.mc.LDM(r.sp.value, range(2, 12), w=1) # XXX Replace with POP instr. someday
+        self.a.mc.POP(range(2, 12))
         self.a.gen_func_epilog()
         assert run_asm(self.a) == 61
 

Modified: pypy/branch/arm-backend/pypy/jit/backend/arm/test/test_instr_codebuilder.py
==============================================================================
--- pypy/branch/arm-backend/pypy/jit/backend/arm/test/test_instr_codebuilder.py	(original)
+++ pypy/branch/arm-backend/pypy/jit/backend/arm/test/test_instr_codebuilder.py	Fri Nov  5 11:01:20 2010
@@ -1,5 +1,6 @@
 from pypy.jit.backend.arm import registers as r
 from pypy.jit.backend.arm import codebuilder
+from pypy.jit.backend.arm import conditions
 from pypy.jit.backend.arm import instructions
 from pypy.jit.backend.arm.test.support import requires_arm_as
 from gen import assemble
@@ -121,6 +122,30 @@
 
         self.assert_equal('MCR P15, 0, r1, c7, c10, 0')
 
+    def test_push_eq_stmdb(self):
+        # XXX check other conditions in STMDB
+        self.cb.PUSH([reg.value for reg in r.caller_resp], cond=conditions.AL)
+        self.assert_equal('STMDB SP!, {r0, r1, r2, r3}')
+
+    def test_push(self):
+        self.cb.PUSH([reg.value for reg in r.caller_resp], cond=conditions.AL)
+        self.assert_equal('PUSH {r0, r1, r2, r3}')
+
+    def test_push_raises_sp(self):
+        assert py.test.raises(AssertionError, 'self.cb.PUSH([r.sp.value])')
+
+    def test_pop(self):
+        self.cb.POP([reg.value for reg in r.caller_resp], cond=conditions.AL)
+        self.assert_equal('POP {r0, r1, r2, r3}')
+
+    def test_pop_eq_ldm(self):
+        # XXX check other conditions in LDM
+        self.cb.POP([reg.value for reg in r.caller_resp], cond=conditions.AL)
+        self.assert_equal('LDM SP!, {r0, r1, r2, r3}')
+
+    def test_pop_raises_on_lr(self):
+        assert py.test.raises(AssertionError, 'self.cb.POP([r.lr.value])')
+
 
 class TestInstrCodeBuilderForGeneratedInstr(ASMTest):
     def setup_method(self, ffuu_method):