[pypy-svn] r79515 - pypy/branch/arm-backend/pypy/jit/backend/arm/helper
david at codespeak.net
david at codespeak.net
Thu Nov 25 14:47:13 CET 2010
Author: david
Date: Thu Nov 25 14:47:11 2010
New Revision: 79515
Modified:
pypy/branch/arm-backend/pypy/jit/backend/arm/helper/assembler.py
Log:
Another regalloc fix
Modified: pypy/branch/arm-backend/pypy/jit/backend/arm/helper/assembler.py
==============================================================================
--- pypy/branch/arm-backend/pypy/jit/backend/arm/helper/assembler.py (original)
+++ pypy/branch/arm-backend/pypy/jit/backend/arm/helper/assembler.py Thu Nov 25 14:47:11 2010
@@ -68,6 +68,7 @@
def gen_emit_cmp_op(condition, inverse=False):
def f(self, op, regalloc, fcond):
assert fcond is not None
+ args = op.getarglist()
if not inverse:
arg0 = op.getarg(0)
arg1 = op.getarg(1)
@@ -78,13 +79,13 @@
imm_a0 = self._check_imm_arg(arg0)
imm_a1 = self._check_imm_arg(arg1)
if imm_a1 and not imm_a0:
- l0 = regalloc.make_sure_var_in_reg(arg0, [arg1], imm_fine=False)
- l1 = regalloc.make_sure_var_in_reg(arg1, [arg0])
+ l0 = regalloc.make_sure_var_in_reg(arg0, args, imm_fine=False)
+ l1 = regalloc.make_sure_var_in_reg(arg1, args)
res = regalloc.force_allocate_reg(op.result)
self.mc.CMP_ri(l0.value, imm=l1.getint(), cond=fcond)
else:
- l0 = regalloc.make_sure_var_in_reg(arg0, [arg1], imm_fine=False)
- l1 = regalloc.make_sure_var_in_reg(arg1, [arg0], imm_fine=False)
+ l0 = regalloc.make_sure_var_in_reg(arg0, args, imm_fine=False)
+ l1 = regalloc.make_sure_var_in_reg(arg1, args, imm_fine=False)
res = regalloc.force_allocate_reg(op.result)
self.mc.CMP_rr(l0.value, l1.value, cond=fcond)
More information about the Pypy-commit
mailing list