[pypy-svn] pypy arm-backed-float: merge arm-backend-2

bivab commits-noreply at bitbucket.org
Fri Apr 1 11:03:02 CEST 2011


Author: David Schneider <david.schneider at picle.org>
Branch: arm-backed-float
Changeset: r43066:bce69b9a0679
Date: 2011-03-31 11:03 +0200
http://bitbucket.org/pypy/pypy/changeset/bce69b9a0679/

Log:	merge arm-backend-2

diff --git a/pypy/jit/backend/arm/assembler.py b/pypy/jit/backend/arm/assembler.py
--- a/pypy/jit/backend/arm/assembler.py
+++ b/pypy/jit/backend/arm/assembler.py
@@ -1,3 +1,4 @@
+from pypy.jit.backend.arm.helper.assembler import saved_registers
 from pypy.jit.backend.arm import conditions as c
 from pypy.jit.backend.arm import locations
 from pypy.jit.backend.arm import registers as r
@@ -228,10 +229,9 @@
 
     def _gen_leave_jitted_hook_code(self, save_exc=False):
         mc = ARMv7Builder()
-        mc.PUSH([reg.value for reg in r.caller_resp] + [r.ip.value])
-        addr = self.cpu.get_on_leave_jitted_int(save_exception=save_exc)
-        mc.BL(addr)
-        mc.POP([reg.value for reg in r.caller_resp]+[r.ip.value])
+        with saved_registers(mc, r.caller_resp + [r.ip]):
+            addr = self.cpu.get_on_leave_jitted_int(save_exception=save_exc)
+            mc.BL(addr)
         assert self._exit_code_addr != 0
         mc.B(self._exit_code_addr)
         return mc.materialize(self.cpu.asmmemmgr, [],
@@ -240,15 +240,13 @@
         mc = ARMv7Builder()
         decode_registers_addr = llhelper(self.recovery_func_sign, self.failure_recovery_func)
 
-        mc.PUSH([reg.value for reg in r.all_regs])      # registers r0 .. r10
-        mc.VPUSH([reg.value for reg in r.all_vfp_regs]) # registers d0 .. d15
-        mc.MOV_rr(r.r0.value, r.ip.value)               # move mem block address, to r0
-        mc.MOV_rr(r.r1.value, r.fp.value)               # pass the current frame pointer as second param
-        mc.MOV_rr(r.r2.value, r.sp.value)               # pass the current stack pointer as third param
+        with saved_registers(mc, r.all_regs):
+            mc.MOV_rr(r.r0.value, r.ip.value) # move mem block address, to r0 to pass as
+            mc.MOV_rr(r.r1.value, r.fp.value) # pass the current frame pointer as second param
+            mc.MOV_rr(r.r2.value, r.sp.value) # pass the current stack pointer as third param
 
-        mc.BL(rffi.cast(lltype.Signed, decode_registers_addr))
-        mc.MOV_rr(r.ip.value, r.r0.value)
-        mc.POP([reg.value for reg in r.all_regs])
+            mc.BL(rffi.cast(lltype.Signed, decode_registers_addr))
+            mc.MOV_rr(r.ip.value, r.r0.value)
         mc.MOV_rr(r.r0.value, r.ip.value)
         self.gen_func_epilog(mc=mc)
         return mc.materialize(self.cpu.asmmemmgr, [],

diff --git a/pypy/jit/backend/arm/opassembler.py b/pypy/jit/backend/arm/opassembler.py
--- a/pypy/jit/backend/arm/opassembler.py
+++ b/pypy/jit/backend/arm/opassembler.py
@@ -12,7 +12,7 @@
                                                     gen_emit_cmp_op,
                                                     gen_emit_float_op,
                                                     gen_emit_float_cmp_op,
-                                                    gen_emit_unary_float_op)
+                                                    gen_emit_unary_float_op, saved_registers)
 from pypy.jit.backend.arm.codebuilder import ARMv7Builder, OverwritingBuilder
 from pypy.jit.backend.arm.jump import remap_frame_layout
 from pypy.jit.backend.arm.regalloc import Regalloc, TempInt
@@ -274,33 +274,30 @@
                 t = TempBox()
                 regalloc.force_allocate_reg(t, selected_reg=regalloc.call_result_location(t))
                 regalloc.possibly_free_var(t)
-            self.mc.PUSH([reg.value for reg in r.caller_resp][1:])
+            saved_regs = r.caller_resp[1:]
         else:
-            self.mc.PUSH([reg.value for reg in r.caller_resp])
+            saved_regs = r.caller_resp
+        with saved_registers(self.mc, saved_regs, regalloc=regalloc):
+            # all arguments past the 4th go on the stack
+            if n_args > 4:
+                stack_args = n_args - 4
+                n = stack_args*WORD
+                self._adjust_sp(n, fcond=fcond)
+                for i in range(4, n_args):
+                    self.mov_loc_loc(regalloc.loc(args[i]), r.ip)
+                    self.mc.STR_ri(r.ip.value, r.sp.value, (i-4)*WORD)
 
-        # all arguments past the 4th go on the stack
-        if n_args > 4:
-            stack_args = n_args - 4
-            n = stack_args*WORD
-            self._adjust_sp(n, fcond=fcond)
-            for i in range(4, n_args):
-                self.mov_loc_loc(regalloc.loc(args[i]), r.ip)
-                self.mc.STR_ri(r.ip.value, r.sp.value, (i-4)*WORD)
+            #the actual call
+            self.mc.BL(adr)
+            regalloc.possibly_free_vars(args)
+            # readjust the sp in case we passed some args on the stack
+            if n_args > 4:
+                assert n > 0
+                self._adjust_sp(-n, fcond=fcond)
 
-        #the actual call
-        self.mc.BL(adr)
-        regalloc.possibly_free_vars(args)
-        # readjust the sp in case we passed some args on the stack
-        if n_args > 4:
-            assert n > 0
-            self._adjust_sp(-n, fcond=fcond)
-
-        # restore the argumets stored on the stack
-        if result is not None:
-            regalloc.after_call(result)
-            self.mc.POP([reg.value for reg in r.caller_resp][1:])
-        else:
-            self.mc.POP([reg.value for reg in r.caller_resp])
+            # restore the argumets stored on the stack
+            if result is not None:
+                regalloc.after_call(result)
         return fcond
 
     def emit_op_same_as(self, op, arglocs, regalloc, fcond):
@@ -686,11 +683,10 @@
         jd = descr.outermost_jitdriver_sd
         assert jd is not None
         asm_helper_adr = self.cpu.cast_adr_to_int(jd.assembler_helper_adr)
-        self.mc.PUSH([reg.value for reg in r.caller_resp][1:])
-        # resbox is allready in r0
-        self.mov_loc_loc(arglocs[1], r.r1)
-        self.mc.BL(asm_helper_adr)
-        self.mc.POP([reg.value for reg in r.caller_resp][1:])
+        with saved_registers(self.mc, r.caller_resp[1:], regalloc=regalloc):
+            # resbox is allready in r0
+            self.mov_loc_loc(arglocs[1], r.r1)
+            self.mc.BL(asm_helper_adr)
         if op.result:
             regalloc.after_call(op.result)
         # jump to merge point

diff --git a/pypy/jit/backend/arm/helper/assembler.py b/pypy/jit/backend/arm/helper/assembler.py
--- a/pypy/jit/backend/arm/helper/assembler.py
+++ b/pypy/jit/backend/arm/helper/assembler.py
@@ -1,3 +1,4 @@
+from __future__ import with_statement
 from pypy.jit.backend.arm import conditions as c
 from pypy.jit.backend.arm import registers as r
 from pypy.jit.backend.arm.codebuilder import AbstractARMv7Builder
@@ -31,14 +32,11 @@
     def f(self, op, arglocs, regalloc, fcond):
         assert fcond is not None
         if op.result:
-            self.mc.PUSH([reg.value for reg in r.caller_resp][1:])
+            regs = r.caller_resp[1:]
         else:
-            self.mc.PUSH([reg.value for reg in r.caller_resp])
-        helper(self.mc, fcond)
-        if op.result:
-            self.mc.POP([reg.value for reg in r.caller_resp][1:])
-        else:
-            self.mc.POP([reg.value for reg in r.caller_resp])
+            regs = r.caller_resp
+        with saved_registers(self.mc, regs, regalloc=regalloc):
+            helper(self.mc, fcond)
         return fcond
     return f
 
@@ -81,3 +79,27 @@
         self.mc.MOV_ri(res.value, 0, cond=inv)
         return fcond
     return f
+
+class saved_registers(object):
+    def __init__(self, assembler, regs_to_save, regalloc=None):
+        self.assembler = assembler
+        self.regalloc = regalloc
+        if self.regalloc:
+            self._filter_regs(regs_to_save)
+        else:
+            self.regs = regs_to_save
+
+    def __enter__(self):
+        if len(self.regs) > 0:
+            self.assembler.PUSH([r.value for r in self.regs])
+
+    def __exit__(self, *args):
+        if len(self.regs) > 0:
+            self.assembler.POP([r.value for r in self.regs])
+
+    def _filter_regs(self, regs_to_save):
+        regs = []
+        for box, reg in self.regalloc.reg_bindings.iteritems():
+            if reg in regs_to_save or reg is r.ip:
+                regs.append(reg)
+        self.regs = regs


More information about the Pypy-commit mailing list