[pypy-svn] pypy default: Add a comment.

[arigo]

Author: Armin Rigo <arigo at tunes.org>
Branch: 
Changeset: r43144:0b7edfd84a51
Date: 2011-04-03 19:01 +0200
http://bitbucket.org/pypy/pypy/changeset/0b7edfd84a51/

Log:	Add a comment.

diff --git a/pypy/jit/backend/x86/regloc.py b/pypy/jit/backend/x86/regloc.py
--- a/pypy/jit/backend/x86/regloc.py
+++ b/pypy/jit/backend/x86/regloc.py
@@ -378,6 +378,10 @@
                             _rx86_getattr(self, name + "_l")(val)
                             self.add_pending_relocation()
                         else:
+                            # xxx can we avoid "MOV r11, $val; JMP/CALL *r11"
+                            # in case it would fit a 32-bit displacement?
+                            # Hard, because we don't know yet where this insn
+                            # will end up...
                             assert self.WORD == 8
                             self._load_scratch(val)
                             _rx86_getattr(self, name + "_r")(X86_64_SCRATCH_REG.value)