[pypy-svn] pypy jit-longlong: and, or, xor.

[arigo]

Author: Armin Rigo <arigo at tunes.org>
Branch: jit-longlong
Changeset: r40500:432bc278976f
Date: 2011-01-08 19:08 +0100
http://bitbucket.org/pypy/pypy/changeset/432bc278976f/

Log:	and, or, xor.

diff --git a/pypy/jit/backend/x86/rx86.py b/pypy/jit/backend/x86/rx86.py
--- a/pypy/jit/backend/x86/rx86.py
+++ b/pypy/jit/backend/x86/rx86.py
@@ -548,10 +548,10 @@
     MOVD_rx = xmminsn('\x66', rex_w, '\x0F\x7E', register(2, 8), register(1), '\xC0')
     PADDQ_xx = xmminsn('\x66', rex_nw, '\x0F\xD4', register(1, 8), register(2), '\xC0')
     PSUBQ_xx = xmminsn('\x66', rex_nw, '\x0F\xFB', register(1, 8), register(2), '\xC0')
-    # PAND
-    # POR
+    PAND_xx = xmminsn('\x66', rex_nw, '\x0F\xDB', register(1, 8), register(2), '\xC0')
+    POR_xx  = xmminsn('\x66', rex_nw, '\x0F\xEB', register(1, 8), register(2), '\xC0')
+    PXOR_xx = xmminsn('\x66', rex_nw, '\x0F\xEF', register(1, 8), register(2), '\xC0')
     # PSLLQ
-    # PXOR
 
     # ------------------------------------------------------------
 

diff --git a/pypy/jit/backend/x86/assembler.py b/pypy/jit/backend/x86/assembler.py
--- a/pypy/jit/backend/x86/assembler.py
+++ b/pypy/jit/backend/x86/assembler.py
@@ -1100,7 +1100,10 @@
         self.mc.DIV_r(ecx.value)
 
     genop_llong_add = _binaryop("PADDQ", True)
-    genop_llong_sub = _binaryop("PSUBQ", True)
+    genop_llong_sub = _binaryop("PSUBQ")
+    genop_llong_and = _binaryop("PAND",  True)
+    genop_llong_or  = _binaryop("POR",   True)
+    genop_llong_xor = _binaryop("PXOR",  True)
 
     def genop_llong_to_int(self, op, arglocs, resloc):
         loc = arglocs[0]

diff --git a/pypy/jit/backend/x86/regloc.py b/pypy/jit/backend/x86/regloc.py
--- a/pypy/jit/backend/x86/regloc.py
+++ b/pypy/jit/backend/x86/regloc.py
@@ -459,6 +459,9 @@
 
     PADDQ = _binaryop('PADDQ')
     PSUBQ = _binaryop('PSUBQ')
+    PAND  = _binaryop('PAND')
+    POR   = _binaryop('POR')
+    PXOR  = _binaryop('PXOR')
 
     CALL = _relative_unaryop('CALL')
     JMP = _relative_unaryop('JMP')

diff --git a/pypy/jit/backend/x86/regalloc.py b/pypy/jit/backend/x86/regalloc.py
--- a/pypy/jit/backend/x86/regalloc.py
+++ b/pypy/jit/backend/x86/regalloc.py
@@ -677,14 +677,20 @@
                    guard_not_forced_op=guard_not_forced_op)
 
     def consider_call(self, op):
-        effectinfo = op.getdescr().get_extra_info()
-        if effectinfo is not None:
-            oopspecindex = effectinfo.oopspecindex
-            if oopspecindex in (EffectInfo.OS_LLONG_ADD,
-                                EffectInfo.OS_LLONG_SUB):
-                return self._consider_llong_binop_rr(op)
-            if oopspecindex == EffectInfo.OS_LLONG_TO_INT:
-                return self._consider_llong_to_int(op)
+        if IS_X86_32:
+            # support for some of the llong operations,
+            # which only exist on x86-32
+            effectinfo = op.getdescr().get_extra_info()
+            if effectinfo is not None:
+                oopspecindex = effectinfo.oopspecindex
+                if oopspecindex in (EffectInfo.OS_LLONG_ADD,
+                                    EffectInfo.OS_LLONG_SUB,
+                                    EffectInfo.OS_LLONG_AND,
+                                    EffectInfo.OS_LLONG_OR,
+                                    EffectInfo.OS_LLONG_XOR):
+                    return self._consider_llong_binop_rr(op)
+                if oopspecindex == EffectInfo.OS_LLONG_TO_INT:
+                    return self._consider_llong_to_int(op)
         #
         self._consider_call(op)