[pypy-svn] pypy default: Fix test_compile_framework_vref on 64-bit.
arigo
commits-noreply at bitbucket.org
Sun Jan 16 12:41:14 CET 2011
Author: Armin Rigo <arigo at tunes.org>
Branch:
Changeset: r40712:e8966331cd0d
Date: 2011-01-16 12:40 +0100
http://bitbucket.org/pypy/pypy/changeset/e8966331cd0d/
Log: Fix test_compile_framework_vref on 64-bit. Hopefully fixes
pypy-c-jit tests on 64-bit.
diff --git a/pypy/jit/backend/x86/assembler.py b/pypy/jit/backend/x86/assembler.py
--- a/pypy/jit/backend/x86/assembler.py
+++ b/pypy/jit/backend/x86/assembler.py
@@ -1845,13 +1845,8 @@
cls = self.cpu.gc_ll_descr.has_write_barrier_class()
assert cls is not None and isinstance(descr, cls)
loc_base = arglocs[0]
- if isinstance(loc_base, RegLoc):
- self.mc.TEST8_mi((loc_base.value, descr.jit_wb_if_flag_byteofs),
- descr.jit_wb_if_flag_singlebyte)
- else:
- assert isinstance(loc_base, ImmedLoc)
- self.mc.TEST8_ji(loc_base.value + descr.jit_wb_if_flag_byteofs,
- descr.jit_wb_if_flag_singlebyte)
+ self.mc.TEST8(addr_add_const(loc_base, descr.jit_wb_if_flag_byteofs),
+ imm(descr.jit_wb_if_flag_singlebyte))
self.mc.J_il8(rx86.Conditions['Z'], 0) # patched later
jz_location = self.mc.get_relative_pos()
# the following is supposed to be the slow path, so whenever possible
diff --git a/pypy/jit/backend/x86/regloc.py b/pypy/jit/backend/x86/regloc.py
--- a/pypy/jit/backend/x86/regloc.py
+++ b/pypy/jit/backend/x86/regloc.py
@@ -474,6 +474,7 @@
SHR = _binaryop('SHR')
SAR = _binaryop('SAR')
TEST = _binaryop('TEST')
+ TEST8 = _binaryop('TEST8')
ADD = _binaryop('ADD')
SUB = _binaryop('SUB')
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