[pypy-commit] pypy r15-for-exception: No-op: make the code more regular.

arigo noreply at buildbot.pypy.org
Sat Jul 9 12:13:59 CEST 2011


Author: Armin Rigo <arigo at tunes.org>
Branch: r15-for-exception
Changeset: r45435:4c3883bc1f51
Date: 2011-07-09 12:21 +0200
http://bitbucket.org/pypy/pypy/changeset/4c3883bc1f51/

Log:	No-op: make the code more regular.

diff --git a/pypy/jit/backend/x86/arch.py b/pypy/jit/backend/x86/arch.py
--- a/pypy/jit/backend/x86/arch.py
+++ b/pypy/jit/backend/x86/arch.py
@@ -19,18 +19,19 @@
     assert special_register is None
 else:
     WORD = 8
-    # rbp + rbx + r12 + r13 + r14 + r15? + 11 extra words + force_index = 18
-    FRAME_FIXED_SIZE = 18
-    FORCE_INDEX_OFS = -17*WORD
-    MY_COPY_OF_REGS = -16*WORD
-    IS_X86_32 = False
-    IS_X86_64 = True
     if special_register is not None:
         assert special_register == 15
-        # remove r15 from the saved registers and from the extra words
+        # rbp + rbx + r12 + r13 + r14 + 10 extra words + force_index = 16
         FRAME_FIXED_SIZE = 16
         FORCE_INDEX_OFS = -15*WORD
         MY_COPY_OF_REGS = -14*WORD
+    else:
+        # rbp + rbx + r12 + r13 + r14 + r15 + 11 extra words + force_index = 18
+        FRAME_FIXED_SIZE = 18
+        FORCE_INDEX_OFS = -17*WORD
+        MY_COPY_OF_REGS = -16*WORD
+    IS_X86_32 = False
+    IS_X86_64 = True
 
 # The extra space has room for almost all registers, apart from eax and edx
 # which are used in the malloc itself.  They are:


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