[pypy-commit] pypy arm-backend-2: add propper names to functions generated for the register allocator

bivab noreply at buildbot.pypy.org
Wed Jul 13 17:06:57 CEST 2011


Author: David Schneider <david.schneider at picle.org>
Branch: arm-backend-2
Changeset: r45563:90628c54e101
Date: 2011-07-13 17:06 +0200
http://bitbucket.org/pypy/pypy/changeset/90628c54e101/

Log:	add propper names to functions generated for the register allocator

diff --git a/pypy/jit/backend/arm/helper/regalloc.py b/pypy/jit/backend/arm/helper/regalloc.py
--- a/pypy/jit/backend/arm/helper/regalloc.py
+++ b/pypy/jit/backend/arm/helper/regalloc.py
@@ -14,7 +14,7 @@
         return i <= size and lower_bound
     return False
 
-def prepare_op_unary_cmp():
+def prepare_op_unary_cmp(name=None):
     def f(self, op, fcond):
         assert fcond is not None
         a0 = op.getarg(0)
@@ -22,9 +22,11 @@
         res = self.force_allocate_reg(op.result, [box])
         self.possibly_free_vars([a0, box, op.result])
         return [reg, res]
+    if name:
+        f.__name__ = name
     return f
 
-def prepare_op_ri(imm_size=0xFF, commutative=True, allow_zero=True):
+def prepare_op_ri(name=None, imm_size=0xFF, commutative=True, allow_zero=True):
     def f(self, op, fcond):
         assert fcond is not None
         a0 = op.getarg(0)
@@ -49,6 +51,8 @@
         res = self.force_allocate_reg(op.result, boxes)
         self.possibly_free_var(op.result)
         return [l0, l1, res]
+    if name:
+        f.__name__ = name
     return f
 
 def prepare_float_op(base=True, float_result=True):
@@ -70,7 +74,7 @@
         return locs
     return f
 
-def prepare_op_by_helper_call():
+def prepare_op_by_helper_call(name):
     def f(self, op, fcond):
         assert fcond is not None
         a0 = op.getarg(0)
@@ -86,9 +90,10 @@
         self.possibly_free_var(a1)
         self.possibly_free_var(op.result)
         return []
+    f.__name__ = name
     return f
 
-def prepare_cmp_op(inverse=False):
+def prepare_cmp_op(name=None, inverse=False):
     def f(self, op, fcond):
         assert fcond is not None
         boxes = list(op.getarglist())
@@ -111,4 +116,6 @@
         res = self.force_allocate_reg(op.result)
         self.possibly_free_var(op.result)
         return [l0, l1, res]
+    if name:
+        f.__name__ = name
     return f
diff --git a/pypy/jit/backend/arm/regalloc.py b/pypy/jit/backend/arm/regalloc.py
--- a/pypy/jit/backend/arm/regalloc.py
+++ b/pypy/jit/backend/arm/regalloc.py
@@ -400,29 +400,29 @@
         self.possibly_free_vars(guard.getfailargs())
         return locs
 
-    prepare_op_int_floordiv = prepare_op_by_helper_call()
-    prepare_op_int_mod = prepare_op_by_helper_call()
-    prepare_op_uint_floordiv = prepare_op_by_helper_call()
+    prepare_op_int_floordiv = prepare_op_by_helper_call('int_floordiv')
+    prepare_op_int_mod = prepare_op_by_helper_call('int_mod')
+    prepare_op_uint_floordiv = prepare_op_by_helper_call('unit_floordiv')
 
-    prepare_op_int_and = prepare_op_ri()
-    prepare_op_int_or = prepare_op_ri()
-    prepare_op_int_xor = prepare_op_ri()
-    prepare_op_int_lshift = prepare_op_ri(imm_size=0x1F, allow_zero=False, commutative=False)
-    prepare_op_int_rshift = prepare_op_ri(imm_size=0x1F, allow_zero=False, commutative=False)
-    prepare_op_uint_rshift = prepare_op_ri(imm_size=0x1F, allow_zero=False, commutative=False)
+    prepare_op_int_and = prepare_op_ri('int_and')
+    prepare_op_int_or = prepare_op_ri('int_or')
+    prepare_op_int_xor = prepare_op_ri('int_xor')
+    prepare_op_int_lshift = prepare_op_ri('int_lshift', imm_size=0x1F, allow_zero=False, commutative=False)
+    prepare_op_int_rshift = prepare_op_ri('int_rshift', imm_size=0x1F, allow_zero=False, commutative=False)
+    prepare_op_uint_rshift = prepare_op_ri('uint_rshift', imm_size=0x1F, allow_zero=False, commutative=False)
 
-    prepare_op_int_lt = prepare_cmp_op()
-    prepare_op_int_le = prepare_cmp_op()
-    prepare_op_int_eq = prepare_cmp_op()
-    prepare_op_int_ne = prepare_cmp_op()
-    prepare_op_int_gt = prepare_cmp_op()
-    prepare_op_int_ge = prepare_cmp_op()
+    prepare_op_int_lt = prepare_cmp_op('int_lt')
+    prepare_op_int_le = prepare_cmp_op('int_le')
+    prepare_op_int_eq = prepare_cmp_op('int_eq')
+    prepare_op_int_ne = prepare_cmp_op('int_ne')
+    prepare_op_int_gt = prepare_cmp_op('int_gt')
+    prepare_op_int_ge = prepare_cmp_op('int_ge')
 
-    prepare_op_uint_le = prepare_cmp_op()
-    prepare_op_uint_gt = prepare_cmp_op()
+    prepare_op_uint_le = prepare_cmp_op('uint_le')
+    prepare_op_uint_gt = prepare_cmp_op('uint_gt')
 
-    prepare_op_uint_lt = prepare_cmp_op(inverse=True)
-    prepare_op_uint_ge = prepare_cmp_op(inverse=True)
+    prepare_op_uint_lt = prepare_cmp_op('uint_lt', inverse=True)
+    prepare_op_uint_ge = prepare_cmp_op('uint_ge', inverse=True)
 
     prepare_op_int_add_ovf = prepare_op_int_add
     prepare_op_int_sub_ovf = prepare_op_int_sub
@@ -430,8 +430,8 @@
     prepare_op_ptr_eq = prepare_op_int_eq
     prepare_op_ptr_ne = prepare_op_int_ne
 
-    prepare_op_int_is_true = prepare_op_unary_cmp()
-    prepare_op_int_is_zero = prepare_op_unary_cmp()
+    prepare_op_int_is_true = prepare_op_unary_cmp('int_is_true')
+    prepare_op_int_is_zero = prepare_op_unary_cmp('int_is_zero')
 
     def prepare_op_int_neg(self, op, fcond):
         l0, box = self._ensure_value_is_boxed(op.getarg(0))


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