[pypy-commit] pypy default: Few fixes for test_zll_random on 32bit

fijal noreply at buildbot.pypy.org
Wed Oct 26 19:36:00 CEST 2011


Author: Maciej Fijalkowski <fijall at gmail.com>
Branch: 
Changeset: r48482:a2b911e61392
Date: 2011-10-26 19:35 +0200
http://bitbucket.org/pypy/pypy/changeset/a2b911e61392/

Log:	Few fixes for test_zll_random on 32bit

diff --git a/pypy/jit/backend/llsupport/regalloc.py b/pypy/jit/backend/llsupport/regalloc.py
--- a/pypy/jit/backend/llsupport/regalloc.py
+++ b/pypy/jit/backend/llsupport/regalloc.py
@@ -178,6 +178,8 @@
         cur_max_age = -1
         candidate = None
         for next in self.reg_bindings:
+            if isinstance(next, TempBox):
+                continue
             reg = self.reg_bindings[next]
             if next in forbidden_vars:
                 continue
diff --git a/pypy/jit/backend/x86/assembler.py b/pypy/jit/backend/x86/assembler.py
--- a/pypy/jit/backend/x86/assembler.py
+++ b/pypy/jit/backend/x86/assembler.py
@@ -1613,7 +1613,10 @@
     def genop_discard_setinteriorfield_gc(self, op, arglocs):
         base_loc, ofs_loc, itemsize_loc, fieldsize_loc, index_loc, value_loc = arglocs
         # XXX should not use IMUL in most cases
-        self.mc.IMUL(index_loc, itemsize_loc)
+        if isinstance(index_loc, ImmedLoc):
+            index_loc = imm(index_loc.value * itemsize_loc.value)
+        else:
+            self.mc.IMUL(index_loc, itemsize_loc)
         dest_addr = AddressLoc(base_loc, index_loc, 0, ofs_loc.value)
         self.save_into_mem(dest_addr, value_loc, fieldsize_loc)
 
diff --git a/pypy/jit/backend/x86/regalloc.py b/pypy/jit/backend/x86/regalloc.py
--- a/pypy/jit/backend/x86/regalloc.py
+++ b/pypy/jit/backend/x86/regalloc.py
@@ -1042,14 +1042,18 @@
         t = self._unpack_interiorfielddescr(op.getdescr())
         ofs, itemsize, fieldsize, _ = t
         args = op.getarglist()
-        tmpvar = TempBox()
+        if fieldsize.value == 1:
+            need_lower_byte = True
+        else:
+            need_lower_byte = False
         base_loc = self.rm.make_sure_var_in_reg(op.getarg(0), args)
-        index_loc = self.rm.force_result_in_reg(tmpvar, op.getarg(1),
-                                                args)
+        tempvar = TempBox()
+        index_loc = self.rm.force_result_in_reg(tempvar, op.getarg(1), args)
         # we're free to modify index now
-        value_loc = self.make_sure_var_in_reg(op.getarg(2), args)
+        value_loc = self.make_sure_var_in_reg(op.getarg(2), args,
+                                              need_lower_byte=need_lower_byte)
+        self.rm.possibly_free_var(tempvar)
         self.possibly_free_vars(args)
-        self.rm.possibly_free_var(tmpvar)
         self.PerformDiscard(op, [base_loc, ofs, itemsize, fieldsize,
                                  index_loc, value_loc])
 


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