[pypy-commit] pypy ppc-jit-backend: Finished implementation of regalloc_mov, added further tests.

[hager]

Author: hager <sven.hager at uni-duesseldorf.de>
Branch: ppc-jit-backend
Changeset: r47660:982bc81e4f01
Date: 2011-09-28 18:18 +0200
http://bitbucket.org/pypy/pypy/changeset/982bc81e4f01/

Log:	Finished implementation of regalloc_mov, added further tests.

diff --git a/pypy/jit/backend/ppc/ppcgen/ppc_assembler.py b/pypy/jit/backend/ppc/ppcgen/ppc_assembler.py
--- a/pypy/jit/backend/ppc/ppcgen/ppc_assembler.py
+++ b/pypy/jit/backend/ppc/ppcgen/ppc_assembler.py
@@ -325,6 +325,7 @@
             clt.asmmemmgr_blocks = []
         return clt.asmmemmgr_blocks
 
+    # XXX fix for 64 bit
     def regalloc_mov(self, prev_loc, loc):
         if prev_loc.is_imm():
             value = prev_loc.getint()
@@ -332,12 +333,41 @@
             if loc.is_reg():
                 reg = loc.as_key()
                 self.mc.load_imm(reg, value)
+                return
             # move immediate value to memory
-            else:
+            elif loc.is_stack():
                 offset = loc.as_key() * WORD - WORD
                 self.mc.load_imm(r.r0.value, value)
-                self.mc.stw(r.r0, r.SPP, offset)
-            return
+                self.mc.stw(r.r0.value, r.SPP.value, offset)
+                return
+            assert 0, "not supported location"
+        elif prev_loc.is_stack():
+            offset = prev_loc.as_key() * WORD - WORD
+            # move from memory to register
+            if loc.is_reg():
+                reg = loc.as_key()
+                self.mc.lwz(reg, r.SPP.value, offset)
+                return
+            # move in memory
+            elif loc.is_stack():
+                target_offset = loc.as_key() * WORD - WORD
+                self.mc.lwz(r.r0.value, r.SPP.value, offset)
+                self.mc.stw(r.r0.value, r.SPP.value, target_offset)
+                return
+            assert 0, "not supported location"
+        elif prev_loc.is_reg():
+            reg = prev_loc.as_key()
+            # move to another register
+            if loc.is_reg():
+                other_reg = loc.as_key()
+                self.mc.mr(other_reg, reg)
+                return
+            # move to memory
+            elif loc.is_stack():
+                offset = loc.as_key() * WORD - WORD
+                self.mc.stw(reg, r.SPP.value, offset)
+                return
+            assert 0, "not supported location"
         assert 0, "not supported location"
 
 def make_operations():
diff --git a/pypy/jit/backend/ppc/ppcgen/test/test_regalloc.py b/pypy/jit/backend/ppc/ppcgen/test/test_regalloc.py
--- a/pypy/jit/backend/ppc/ppcgen/test/test_regalloc.py
+++ b/pypy/jit/backend/ppc/ppcgen/test/test_regalloc.py
@@ -33,8 +33,7 @@
 
     def __eq__(self, other):
         assert isinstance(other, MockInstruction)
-        #return self.name == other.name and self.args == other.args
-        return str(self) == str(other)
+        return self.name == other.name and self.args == other.args
 
     def __repr__(self):
         return self.__str__()
@@ -96,11 +95,38 @@
         self.asm.regalloc_mov(imm(big), stack(7))
 
         exp_instr = [MI("load_imm", 0, 5),
-                     MI("stw", r0, SPP, -(6 * WORD + WORD)),
+                     MI("stw", r0.value, SPP.value, -(6 * WORD + WORD)),
                      MI("load_imm", 0, big),
-                     MI("stw", r0, SPP, -(7 * WORD + WORD))]
+                     MI("stw", r0.value, SPP.value, -(7 * WORD + WORD))]
         assert self.asm.mc.instrs == exp_instr
 
+    def test_mem_to_reg(self):
+        self.asm.regalloc_mov(stack(5), reg(10))
+        self.asm.regalloc_mov(stack(0), reg(0))
+        exp_instrs = [MI("lwz", r10.value, SPP.value, -(5 * WORD + WORD)),
+                      MI("lwz", r0.value, SPP.value, -(WORD))]
+        assert self.asm.mc.instrs == exp_instrs
+
+    def test_mem_to_mem(self):
+        self.asm.regalloc_mov(stack(5), stack(6))
+        exp_instrs = [MI("lwz", r0.value, SPP.value, -(5 * WORD + WORD)),
+                      MI("stw", r0.value, SPP.value, -(6 * WORD + WORD))]
+        assert self.asm.mc.instrs == exp_instrs
+
+    def test_reg_to_reg(self):
+        self.asm.regalloc_mov(reg(0), reg(1))
+        self.asm.regalloc_mov(reg(5), reg(10))
+        exp_instrs = [MI("mr", r1.value, r0.value),
+                      MI("mr", r10.value, r5.value)]
+        assert self.asm.mc.instrs == exp_instrs
+
+    def test_reg_to_mem(self):
+        self.asm.regalloc_mov(reg(5), stack(10))
+        self.asm.regalloc_mov(reg(0), stack(2))
+        exp_instrs = [MI("stw", r5.value, SPP.value, -(10 * WORD + WORD)),
+                      MI("stw", r0.value, SPP.value, -(2 * WORD + WORD))]
+        assert self.asm.mc.instrs == exp_instrs
+
 def reg(i):
     return RegisterLocation(i)