[pypy-commit] pypy arm-backend-2: test and refactor mov_from_vfp_loc

[bivab]

Author: David Schneider <david.schneider at picle.org>
Branch: arm-backend-2
Changeset: r47707:6b54c5d93928
Date: 2011-09-29 14:24 +0200
http://bitbucket.org/pypy/pypy/changeset/6b54c5d93928/

Log:	test and refactor mov_from_vfp_loc

diff --git a/pypy/jit/backend/arm/assembler.py b/pypy/jit/backend/arm/assembler.py
--- a/pypy/jit/backend/arm/assembler.py
+++ b/pypy/jit/backend/arm/assembler.py
@@ -969,24 +969,30 @@
     mov_loc_loc = regalloc_mov
 
     def mov_from_vfp_loc(self, vfp_loc, reg1, reg2, cond=c.AL):
+        """Moves floating point values either as an immediate, in a vfp
+        register or at a stack location to a pair of core registers"""
         assert reg1.value + 1 == reg2.value
         temp = r.lr
         if vfp_loc.is_vfp_reg():
             self.mc.VMOV_rc(reg1.value, reg2.value, vfp_loc.value, cond=cond)
         elif vfp_loc.is_imm_float():
-            self.mc.gen_load_int(temp.value, vfp_loc.getint(), cond=cond)
+            self.mc.PUSH([r.ip.value], cond=cond)
+            self.mc.gen_load_int(r.ip.value, vfp_loc.getint(), cond=cond)
             # we need to load one word to loc and one to loc+1 which are
             # two 32-bit core registers
-            self.mc.LDR_ri(reg1.value, temp.value, cond=cond)
-            self.mc.LDR_ri(reg2.value, temp.value, imm=WORD, cond=cond)
-        elif vfp_loc.is_stack():
-            # load spilled value into vfp reg
+            self.mc.LDR_ri(reg1.value, r.ip.value, cond=cond)
+            self.mc.LDR_ri(reg2.value, r.ip.value, imm=WORD, cond=cond)
+            self.mc.POP([r.ip.value], cond=cond)
+        elif vfp_loc.is_stack() and vfp_loc.type == FLOAT:
+            # load spilled vfp value into two core registers
             offset = ConstInt((vfp_loc.position)*WORD)
             if not _check_imm_arg(offset, size=0xFFF):
-                self.mc.gen_load_int(temp.value, -offset.value, cond=cond)
-                self.mc.LDR_rr(reg1.value, r.fp.value, temp.value, cond=cond)
-                self.mc.ADD_ri(temp.value, temp.value, imm=WORD, cond=cond)
-                self.mc.LDR_rr(reg2.value, r.fp.value, temp.value, cond=cond)
+                self.mc.PUSH([r.ip.value], cond=cond)
+                self.mc.gen_load_int(r.ip.value, -offset.value, cond=cond)
+                self.mc.LDR_rr(reg1.value, r.fp.value, r.ip.value, cond=cond)
+                self.mc.ADD_ri(r.ip.value, r.ip.value, imm=WORD, cond=cond)
+                self.mc.LDR_rr(reg2.value, r.fp.value, r.ip.value, cond=cond)
+                self.mc.POP([r.ip.value], cond=cond)
             else:
                 self.mc.LDR_ri(reg1.value, r.fp.value, imm=-offset.value, cond=cond)
                 self.mc.LDR_ri(reg2.value, r.fp.value, imm=-offset.value+WORD, cond=cond)
diff --git a/pypy/jit/backend/arm/test/test_regalloc_mov.py b/pypy/jit/backend/arm/test/test_regalloc_mov.py
--- a/pypy/jit/backend/arm/test/test_regalloc_mov.py
+++ b/pypy/jit/backend/arm/test/test_regalloc_mov.py
@@ -52,12 +52,15 @@
         self.instrs.append(i)
         return i
 
-class TestRegallocMov(object):
+class BaseMovTest(object):
     def setup_method(self, method):
         self.builder = MockBuilder()
         self.asm = instantiate(AssemblerARM)
         self.asm.mc = self.builder
 
+
+class TestRegallocMov(BaseMovTest):
+
     def mov(self, a, b, expected=None):
         self.asm.regalloc_mov(a, b)
         result =self.builder.instrs
@@ -239,5 +242,56 @@
         py.test.raises(AssertionError, 'self.asm.regalloc_mov(vfp(1), r(2))')
         py.test.raises(AssertionError, 'self.asm.regalloc_mov(vfp(1), stack(2))')
 
-class TestMovFromToVFPLoc(object):
-    pass
+class TestMovFromVFPLoc(BaseMovTest):
+    def mov(self, a, b, c, expected=None):
+        self.asm.mov_from_vfp_loc(a, b, c)
+        result =self.builder.instrs
+        assert result == expected
+
+    def test_from_vfp(self):
+        vr = vfp(10)
+        r1 = r(1)
+        r2 = r(2)
+        e = [mi('VMOV_rc', r1.value, r2.value, vr.value, cond=AL)]
+        self.mov(vr, r1, r2, e)
+
+
+    def test_from_vfp_stack(self):
+        s = stack_float(4)
+        r1 = r(1)
+        r2 = r(2)
+        e = [
+            mi('LDR_ri', r1.value, fp.value, imm=-16, cond=AL),
+            mi('LDR_ri', r2.value, fp.value, imm=-12, cond=AL)]
+        self.mov(s, r1, r2, e)
+
+    def test_from_big_vfp_stack(self):
+        s = stack_float(2049)
+        r1 = r(1)
+        r2 = r(2)
+        e = [
+            mi('PUSH', [ip.value], cond=AL),
+            mi('gen_load_int', ip.value, -2049*4, cond=AL),
+            mi('LDR_rr', r1.value, fp.value, ip.value,cond=AL),
+            mi('ADD_ri', ip.value, ip.value, imm=4, cond=AL),
+            mi('LDR_rr', r2.value, fp.value, ip.value, cond=AL),
+            mi('POP', [ip.value], cond=AL)]
+        self.mov(s, r1, r2, e)
+
+    def test_from_imm_float(self):
+        i = imm_float(4)
+        r1 = r(1)
+        r2 = r(2)
+        e = [
+            mi('PUSH', [ip.value], cond=AL),
+            mi('gen_load_int', ip.value, i.value, cond=AL),
+            mi('LDR_ri', r1.value, ip.value, cond=AL),
+            mi('LDR_ri', r2.value, ip.value, imm=4, cond=AL),
+            mi('POP', [ip.value], cond=AL)]
+        self.mov(i, r1, r2, e)
+
+    def test_unsupported(self):
+        py.test.raises(AssertionError, 'self.asm.mov_from_vfp_loc(vfp(1), r(5), r(2))')
+        py.test.raises(AssertionError, 'self.asm.mov_from_vfp_loc(stack(1), r(1), r(2))')
+        py.test.raises(AssertionError, 'self.asm.mov_from_vfp_loc(imm(1), r(1), r(2))')
+        py.test.raises(AssertionError, 'self.asm.mov_from_vfp_loc(r(1), r(1), r(2))')