[pypy-commit] pypy arm-backend-2: Add tests for SIMD instructions and fix VORR

[bivab]

Author: David Schneider <david.schneider at picle.org>
Branch: arm-backend-2
Changeset: r54200:563b0debb79e
Date: 2012-03-28 10:32 +0000
http://bitbucket.org/pypy/pypy/changeset/563b0debb79e/

Log:	Add tests for SIMD instructions and fix VORR

diff --git a/pypy/jit/backend/arm/instructions.py b/pypy/jit/backend/arm/instructions.py
--- a/pypy/jit/backend/arm/instructions.py
+++ b/pypy/jit/backend/arm/instructions.py
@@ -145,6 +145,6 @@
     'VADD_i64': {'A': 0x8, 'B': 0, 'U': 0},
     'VSUB_i64': {'A': 0x8, 'B': 0, 'U': 1},
     'VAND_i64': {'A': 0x1, 'B': 1, 'U': 0, 'C': 0},
-    'VORR_i64': {'A': 0x1, 'B': 1, 'U': 0, 'C': 0x10},
+    'VORR_i64': {'A': 0x1, 'B': 1, 'U': 0, 'C': 0x2},
     'VEOR_i64': {'A': 0x1, 'B': 1, 'U': 1, 'C': 0x0},
 }
diff --git a/pypy/jit/backend/arm/test/test_instr_codebuilder.py b/pypy/jit/backend/arm/test/test_instr_codebuilder.py
--- a/pypy/jit/backend/arm/test/test_instr_codebuilder.py
+++ b/pypy/jit/backend/arm/test/test_instr_codebuilder.py
@@ -284,6 +284,10 @@
             tests.append((asm, (r.r3.value, range(regs+1))))
     return tests
 
+def gen_test_simd_instructions_3regs_func(name, table):
+    op_name = name[:name.index('_')]
+    return  [('d1, d2, d3', (r.d1.value, r.d2.value, r.d3.value), {}, '.i64')]
+
 def build_tests():
     cls = TestInstrCodeBuilderForGeneratedInstr
     test_name = 'test_generated_%s'