[pypy-commit] pypy ppc-backend-2: Add mffgpr and mftgpr instructions. Use them.

edelsohn noreply at buildbot.pypy.org
Tue Apr 24 19:52:06 CEST 2012


Author: edelsohn
Branch: ppc-backend-2
Changeset: r54732:cc4776340572
Date: 2012-04-24 13:51 -0400
http://bitbucket.org/pypy/pypy/changeset/cc4776340572/

Log:	Add mffgpr and mftgpr instructions. Use them. Use subfic.

diff --git a/pypy/jit/backend/ppc/codebuilder.py b/pypy/jit/backend/ppc/codebuilder.py
--- a/pypy/jit/backend/ppc/codebuilder.py
+++ b/pypy/jit/backend/ppc/codebuilder.py
@@ -225,6 +225,9 @@
 
     fsqrt = XDB(63, XO1=22, Rc=0)
 
+    mffgpr = XS(31, XO1=607, Rc=0)
+    mftgpr = XS(31, XO1=735, Rc=0)
+
     icbi = X0(31, XO1=982)
 
     lbzux = XD(31, XO1=119)
diff --git a/pypy/jit/backend/ppc/opassembler.py b/pypy/jit/backend/ppc/opassembler.py
--- a/pypy/jit/backend/ppc/opassembler.py
+++ b/pypy/jit/backend/ppc/opassembler.py
@@ -53,8 +53,7 @@
     def emit_int_sub(self, op, arglocs, regalloc):
         l0, l1, res = arglocs
         if l0.is_imm():
-            self.mc.load_imm(r.r0, l0.value)
-            self.mc.sub(res.value, r.r0.value, l1.value)
+            self.mc.subfic(res.value, l1.value, l0.value)
         elif l1.is_imm():
             self.mc.subi(res.value, l0.value, l1.value)
         else:
@@ -215,11 +214,11 @@
     def emit_op_cast_float_to_int(self, op, arglocs, regalloc):
         l0, temp_loc, res = arglocs
         self.mc.fctidz(temp_loc.value, l0.value)
-        self.mc.mfprgpr(res.value, temp_loc.value)
+        self.mc.mftgpr(res.value, temp_loc.value)
 
     def emit_op_cast_int_to_float(self, op, arglocs, regalloc):
         l0, temp_loc, res = arglocs
-        self.mc.mgprfpr(temp_loc.value, l0.value)
+        self.mc.mffgpr(temp_loc.value, l0.value)
         self.mc.fcfid(res.value, temp_loc.value)
 
 class GuardOpAssembler(object):


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