[pypy-commit] pypy arm-backend-2: merge heads
bivab
noreply at buildbot.pypy.org
Wed Jan 18 17:53:50 CET 2012
Author: David Schneider <david.schneider at picle.org>
Branch: arm-backend-2
Changeset: r51452:aee28928eeae
Date: 2012-01-18 17:46 +0100
http://bitbucket.org/pypy/pypy/changeset/aee28928eeae/
Log: merge heads
diff --git a/pypy/jit/backend/arm/assembler.py b/pypy/jit/backend/arm/assembler.py
--- a/pypy/jit/backend/arm/assembler.py
+++ b/pypy/jit/backend/arm/assembler.py
@@ -674,7 +674,7 @@
return AsmInfo(ops_offset, startpos + rawstart, codeendpos - startpos)
def _find_failure_recovery_bytecode(self, faildescr):
- guard_stub_addr = faildescr._arm_recovery_stub_offset
+ guard_stub_addr = faildescr._arm_failure_recovery_block
if guard_stub_addr == 0:
# This case should be prevented by the logic in compile.py:
# look for CNT_BUSY_FLAG, which disables tracing from a guard
@@ -709,34 +709,25 @@
tok.faillocs, save_exc=tok.save_exc)
# store info on the descr
descr._arm_current_frame_depth = tok.faillocs[0].getint()
- descr._arm_guard_pos = pos
def process_pending_guards(self, block_start):
clt = self.current_clt
for tok in self.pending_guards:
descr = tok.descr
assert isinstance(descr, AbstractFailDescr)
- jump_target = tok.pos_recovery_stub
- relative_target = jump_target - tok.offset
-
- addr = block_start + tok.offset
- stub_addr = block_start + jump_target
-
- descr._arm_recovery_stub_offset = stub_addr
-
+ failure_recovery_pos = block_start + tok.pos_recovery_stub
+ descr._arm_failure_recovery_block = failure_recovery_pos
+ relative_offset = tok.pos_recovery_stub - tok.offset
+ guard_pos = block_start + tok.offset
if not tok.is_invalidate:
- #patch the guard jumpt to the stub
+ # patch the guard jumpt to the stub
# overwrite the generate NOP with a B_offs to the pos of the
# stub
mc = ARMv7Builder()
- mc.B_offs(relative_target, c.get_opposite_of(tok.fcond))
- mc.copy_to_raw_memory(addr)
+ mc.B_offs(relative_offset, c.get_opposite_of(tok.fcond))
+ mc.copy_to_raw_memory(guard_pos)
else:
- # GUARD_NOT_INVALIDATED, record an entry in
- # clt.invalidate_positions of the form:
- # (addr-in-the-code-of-the-not-yet-written-jump-target,
- # relative-target-to-use)
- clt.invalidate_positions.append((addr, relative_target))
+ clt.invalidate_positions.append((guard_pos, relative_offset))
def get_asmmemmgr_blocks(self, looptoken):
clt = looptoken.compiled_loop_token
@@ -875,14 +866,12 @@
self.mc.ASR_ri(resloc.value, resloc.value, 16)
def patch_trace(self, faildescr, looptoken, bridge_addr, regalloc):
- # The first instruction (word) is not overwritten, because it is the
- # one that actually checks the condition
b = ARMv7Builder()
- adr_jump_offset = faildescr._arm_recovery_stub_offset
- assert adr_jump_offset != 0
+ patch_addr = faildescr._arm_failure_recovery_block
+ assert patch_addr != 0
b.B(bridge_addr)
- b.copy_to_raw_memory(adr_jump_offset)
- faildescr._arm_recovery_stub_offset = 0
+ b.copy_to_raw_memory(patch_addr)
+ faildescr._arm_failure_recovery_block = 0
# regalloc support
def load(self, loc, value):
diff --git a/pypy/jit/backend/arm/opassembler.py b/pypy/jit/backend/arm/opassembler.py
--- a/pypy/jit/backend/arm/opassembler.py
+++ b/pypy/jit/backend/arm/opassembler.py
@@ -267,38 +267,28 @@
# from ../x86/assembler.py:1265
def emit_op_guard_class(self, op, arglocs, regalloc, fcond):
self._cmp_guard_class(op, arglocs, regalloc, fcond)
+ self._emit_guard(op, arglocs[3:], c.EQ, save_exc=False)
return fcond
def emit_op_guard_nonnull_class(self, op, arglocs, regalloc, fcond):
- offset = self.cpu.vtable_offset
+ self.mc.CMP_ri(arglocs[0].value, 1)
+ self._cmp_guard_class(op, arglocs, regalloc, c.HS)
+ self._emit_guard(op, arglocs[3:], c.EQ, save_exc=False)
+ return fcond
- self.mc.CMP_ri(arglocs[0].value, 0)
+ def _cmp_guard_class(self, op, locs, regalloc, fcond):
+ offset = locs[2]
if offset is not None:
- self._emit_guard(op, arglocs[3:], c.NE, save_exc=False)
+ self.mc.LDR_ri(r.ip.value, locs[0].value, offset.value, cond=fcond)
+ self.mc.CMP_rr(r.ip.value, locs[1].value, cond=fcond)
else:
raise NotImplementedError
- self._cmp_guard_class(op, arglocs, regalloc, fcond)
- return fcond
+ # XXX port from x86 backend once gc support is in place
def emit_op_guard_not_invalidated(self, op, locs, regalloc, fcond):
return self._emit_guard(op, locs, fcond, save_exc=False,
is_guard_not_invalidated=True)
- def _cmp_guard_class(self, op, locs, regalloc, fcond):
- offset = locs[2]
- if offset is not None:
- if offset.is_imm():
- self.mc.LDR_ri(r.ip.value, locs[0].value, offset.value)
- else:
- assert offset.is_reg()
- self.mc.LDR_rr(r.ip.value, locs[0].value, offset.value)
- self.mc.CMP_rr(r.ip.value, locs[1].value)
- else:
- raise NotImplementedError
- # XXX port from x86 backend once gc support is in place
-
- return self._emit_guard(op, locs[3:], c.EQ, save_exc=False)
-
class OpAssembler(object):
diff --git a/pypy/jit/backend/arm/regalloc.py b/pypy/jit/backend/arm/regalloc.py
--- a/pypy/jit/backend/arm/regalloc.py
+++ b/pypy/jit/backend/arm/regalloc.py
@@ -646,13 +646,14 @@
boxes = op.getarglist()
x = self._ensure_value_is_boxed(boxes[0], boxes)
- y = self.get_scratch_reg(REF, forbidden_vars=boxes)
+ y = self.get_scratch_reg(INT, forbidden_vars=boxes)
y_val = rffi.cast(lltype.Signed, op.getarg(1).getint())
self.assembler.load(y, imm(y_val))
offset = self.cpu.vtable_offset
assert offset is not None
- offset_loc = self._ensure_value_is_boxed(ConstInt(offset), boxes)
+ assert check_imm_arg(offset)
+ offset_loc = imm(offset)
arglocs = self._prepare_guard(op, [x, y, offset_loc])
return arglocs
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