[pypy-commit] pypy arm-backend-2: remove some XXX and update some comments

bivab noreply at buildbot.pypy.org
Thu Jan 26 10:45:16 CET 2012


Author: David Schneider <david.schneider at picle.org>
Branch: arm-backend-2
Changeset: r51773:1aea54f9875c
Date: 2012-01-23 12:29 +0100
http://bitbucket.org/pypy/pypy/changeset/1aea54f9875c/

Log:	remove some XXX and update some comments

diff --git a/pypy/jit/backend/arm/assembler.py b/pypy/jit/backend/arm/assembler.py
--- a/pypy/jit/backend/arm/assembler.py
+++ b/pypy/jit/backend/arm/assembler.py
@@ -32,8 +32,8 @@
 from pypy.jit.backend.x86.support import values_array, memcpy_fn
 
 DEBUG_COUNTER = lltype.Struct('DEBUG_COUNTER', ('i', lltype.Signed),
-                              ('type', lltype.Char), # 'b'ridge, 'l'abel or
-                                                     # 'e'ntry point
+                              ('type', lltype.Char),  # 'b'ridge, 'l'abel or
+                                                      # 'e'ntry point
                               ('number', lltype.Signed))
 
 
@@ -384,7 +384,6 @@
             # are stored in r0 and r1.
             mc.SUB_rr(r.r0.value, r.r1.value, r.r0.value)
             addr = self.cpu.gc_ll_descr.get_malloc_slowpath_addr()
-            # XXX replace with an STMxx operation
             for reg, ofs in ARMv7RegisterManager.REGLOC_TO_COPY_AREA_OFS.items():
                 mc.STR_ri(reg.value, r.fp.value, imm=ofs)
             mc.BL(addr)
@@ -531,8 +530,7 @@
 
     def gen_shadowstack_header(self, gcrootmap):
         # we need to put two words into the shadowstack: the MARKER
-        # and the address of the frame (ebp, actually)
-        # XXX add some comments
+        # and the address of the frame (fp, actually)
         rst = gcrootmap.get_root_stack_top_addr()
         self.mc.gen_load_int(r.ip.value, rst)
         self.mc.LDR_ri(r.r4.value, r.ip.value)  # LDR r4, [rootstacktop]
@@ -1121,23 +1119,18 @@
             self.mc.gen_load_int(r.r1.value, size)
             self.mc.ADD_rr(r.r1.value, r.r0.value, r.r1.value)
 
-        # XXX maybe use an offset from the value nursery_free_addr
         self.mc.gen_load_int(r.ip.value, nursery_top_adr)
         self.mc.LDR_ri(r.ip.value, r.ip.value)
 
         self.mc.CMP_rr(r.r1.value, r.ip.value)
 
-        # XXX update
-        # See comments in _build_malloc_slowpath for the
-        # details of the two helper functions that we are calling below.
-        # First, we need to call two of them and not just one because we
-        # need to have a mark_gc_roots() in between.  Then the calling
-        # convention of slowpath_addr{1,2} are tweaked a lot to allow
-        # the code here to be just two CALLs: slowpath_addr1 gets the
-        # size of the object to allocate from (EDX-EAX) and returns the
-        # result in EAX; self.malloc_slowpath additionally returns in EDX a
-        # copy of heap(nursery_free_adr), so that the final MOV below is
-        # a no-op.
+        # We load into r0 the address stored at nursery_free_adr We calculate
+        # the new value for nursery_free_adr and store in r1 The we load the
+        # address stored in nursery_top_adr into IP If the value in r1 is
+        # (unsigned) bigger than the one in ip we conditionally call
+        # malloc_slowpath in case we called malloc_slowpath, which returns the
+        # new value of nursery_free_adr in r1 and the adr of the new object in
+        # r0.
         self.mark_gc_roots(self.write_new_force_index(),
                            use_copy_area=True)
         self.mc.BL(self.malloc_slowpath, c=c.HI)
diff --git a/pypy/jit/backend/arm/opassembler.py b/pypy/jit/backend/arm/opassembler.py
--- a/pypy/jit/backend/arm/opassembler.py
+++ b/pypy/jit/backend/arm/opassembler.py
@@ -1158,8 +1158,8 @@
 
     def call_release_gil(self, gcrootmap, save_registers, fcond):
         # First, we need to save away the registers listed in
-        # 'save_registers' that are not callee-save.  XXX We assume that
-        # the floating point registers won't be modified.
+        # 'save_registers' that are not callee-save.
+        # NOTE: We assume that  the floating point registers won't be modified.
         regs_to_save = []
         for reg in self._regalloc.rm.save_around_call_regs:
             if reg in save_registers:
@@ -1170,8 +1170,8 @@
 
     def call_reacquire_gil(self, gcrootmap, save_loc, fcond):
         # save the previous result into the stack temporarily.
-        # XXX like with call_release_gil(), we assume that we don't need
-        # to save vfp regs in this case. Besides the result location
+        # NOTE: like with call_release_gil(), we assume that we don't need to
+        # save vfp regs in this case. Besides the result location
         regs_to_save = []
         vfp_regs_to_save = []
         if save_loc.is_reg():
diff --git a/pypy/jit/backend/arm/regalloc.py b/pypy/jit/backend/arm/regalloc.py
--- a/pypy/jit/backend/arm/regalloc.py
+++ b/pypy/jit/backend/arm/regalloc.py
@@ -66,9 +66,6 @@
 
     def __init__(self):
         FrameManager.__init__(self)
-        #self.used = [True]  # keep first slot free
-        # XXX refactor frame to avoid this issue of keeping the first slot
-        # reserved
 
     @staticmethod
     def frame_pos(i, box_type):
@@ -1009,7 +1006,6 @@
         return [res_loc]
 
     def prepare_op_label(self, op, fcond):
-        # XXX big refactoring needed?
         descr = op.getdescr()
         assert isinstance(descr, TargetToken)
         inputargs = op.getarglist()


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