[pypy-commit] pypy remove-PYPY_NOT_MAIN_FILE: Split asm*.h in header and implementation files
amauryfa
noreply at buildbot.pypy.org
Tue Sep 4 22:47:16 CEST 2012
Author: Amaury Forgeot d'Arc <amauryfa at gmail.com>
Branch: remove-PYPY_NOT_MAIN_FILE
Changeset: r57131:751d2acf21c5
Date: 2012-07-22 00:02 +0200
http://bitbucket.org/pypy/pypy/changeset/751d2acf21c5/
Log: Split asm*.h in header and implementation files
diff --git a/pypy/translator/c/genc.py b/pypy/translator/c/genc.py
--- a/pypy/translator/c/genc.py
+++ b/pypy/translator/c/genc.py
@@ -954,6 +954,7 @@
srcdir / 'profiling.c',
srcdir / 'debug_print.c',
srcdir / 'thread.c',
+ srcdir / 'asm.c',
]
if _CYGWIN:
files.append(srcdir / 'cygwin_wait.c')
diff --git a/pypy/translator/c/src/allocator.c b/pypy/translator/c/src/allocator.c
--- a/pypy/translator/c/src/allocator.c
+++ b/pypy/translator/c/src/allocator.c
@@ -1,5 +1,6 @@
/* allocation functions */
#include "common_header.h"
+#include <malloc.h>
#if defined(PYPY_USE_TRIVIAL_MALLOC)
void *PyObject_Malloc(size_t n) { return malloc(n); }
diff --git a/pypy/translator/c/src/asm.c b/pypy/translator/c/src/asm.c
new file mode 100644
--- /dev/null
+++ b/pypy/translator/c/src/asm.c
@@ -0,0 +1,17 @@
+/* optional assembler bits */
+#if defined(__GNUC__) && defined(__i386__)
+# include "src/asm_gcc_x86.c"
+#endif
+
+#if defined(__GNUC__) && defined(__amd64__)
+/* No implementation for the moment. */
+/* # include "src/asm_gcc_x86_64.c" */
+#endif
+
+#if defined(__GNUC__) && defined(__ppc__)
+# include "src/asm_ppc.c"
+#endif
+
+#if defined(MS_WINDOWS) && defined(_MSC_VER)
+# include "src/asm_msvc.c"
+#endif
diff --git a/pypy/translator/c/src/asm_gcc_x86.c b/pypy/translator/c/src/asm_gcc_x86.c
new file mode 100644
--- /dev/null
+++ b/pypy/translator/c/src/asm_gcc_x86.c
@@ -0,0 +1,35 @@
+/* This optional file only works for GCC on an i386.
+ * It replaces some complex macros with native assembler instructions.
+ */
+
+# if 0 /* disabled */
+void op_int_overflowed(void)
+{
+ FAIL_OVF("integer operation");
+}
+# endif
+
+# ifdef PYPY_X86_CHECK_SSE2
+void pypy_x86_check_sse2(void)
+{
+ //Read the CPU features.
+ int features;
+ asm("movl $1, %%eax\n"
+ "pushl %%ebx\n"
+ "cpuid\n"
+ "popl %%ebx\n"
+ "movl %%edx, %0"
+ : "=g"(features) : : "eax", "edx", "ecx");
+
+ //Check bits 25 and 26, this indicates SSE2 support
+ if (((features & (1 << 25)) == 0) || ((features & (1 << 26)) == 0))
+ {
+ fprintf(stderr, "Old CPU with no SSE2 support, cannot continue.\n"
+ "You need to re-translate with "
+ "'--jit-backend=x86-without-sse2'\n");
+ abort();
+ }
+}
+# endif
+
+#endif
diff --git a/pypy/translator/c/src/asm_gcc_x86.h b/pypy/translator/c/src/asm_gcc_x86.h
--- a/pypy/translator/c/src/asm_gcc_x86.h
+++ b/pypy/translator/c/src/asm_gcc_x86.h
@@ -106,40 +106,3 @@
#define PYPY_X86_CHECK_SSE2_DEFINED
extern void pypy_x86_check_sse2(void);
#endif
-
-
-/* implementations */
-
-#ifdef PYPY_MAIN_IMPLEMENTATION_FILE
-
-# if 0 /* disabled */
-void op_int_overflowed(void)
-{
- FAIL_OVF("integer operation");
-}
-# endif
-
-# ifdef PYPY_X86_CHECK_SSE2
-void pypy_x86_check_sse2(void)
-{
- //Read the CPU features.
- int features;
- asm("movl $1, %%eax\n"
- "pushl %%ebx\n"
- "cpuid\n"
- "popl %%ebx\n"
- "movl %%edx, %0"
- : "=g"(features) : : "eax", "edx", "ecx");
-
- //Check bits 25 and 26, this indicates SSE2 support
- if (((features & (1 << 25)) == 0) || ((features & (1 << 26)) == 0))
- {
- fprintf(stderr, "Old CPU with no SSE2 support, cannot continue.\n"
- "You need to re-translate with "
- "'--jit-backend=x86-without-sse2'\n");
- abort();
- }
-}
-# endif
-
-#endif
diff --git a/pypy/translator/c/src/asm_msvc.c b/pypy/translator/c/src/asm_msvc.c
new file mode 100644
--- /dev/null
+++ b/pypy/translator/c/src/asm_msvc.c
@@ -0,0 +1,20 @@
+#ifdef PYPY_X86_CHECK_SSE2
+#include <intrin.h>
+void pypy_x86_check_sse2(void)
+{
+ int features;
+ int CPUInfo[4];
+ CPUInfo[3] = 0;
+ __cpuid(CPUInfo, 1);
+ features = CPUInfo[3];
+
+ //Check bits 25 and 26, this indicates SSE2 support
+ if (((features & (1 << 25)) == 0) || ((features & (1 << 26)) == 0))
+ {
+ fprintf(stderr, "Old CPU with no SSE2 support, cannot continue.\n"
+ "You need to re-translate with "
+ "'--jit-backend=x86-without-sse2'\n");
+ abort();
+ }
+}
+#endif
diff --git a/pypy/translator/c/src/asm_msvc.h b/pypy/translator/c/src/asm_msvc.h
--- a/pypy/translator/c/src/asm_msvc.h
+++ b/pypy/translator/c/src/asm_msvc.h
@@ -1,31 +1,4 @@
-
#ifdef PYPY_X86_CHECK_SSE2
#define PYPY_X86_CHECK_SSE2_DEFINED
extern void pypy_x86_check_sse2(void);
#endif
-
-
-/* implementations */
-
-#ifdef PYPY_MAIN_IMPLEMENTATION_FILE
-#ifdef PYPY_X86_CHECK_SSE2
-#include <intrin.h>
-void pypy_x86_check_sse2(void)
-{
- int features;
- int CPUInfo[4];
- CPUInfo[3] = 0;
- __cpuid(CPUInfo, 1);
- features = CPUInfo[3];
-
- //Check bits 25 and 26, this indicates SSE2 support
- if (((features & (1 << 25)) == 0) || ((features & (1 << 26)) == 0))
- {
- fprintf(stderr, "Old CPU with no SSE2 support, cannot continue.\n"
- "You need to re-translate with "
- "'--jit-backend=x86-without-sse2'\n");
- abort();
- }
-}
-#endif
-#endif
diff --git a/pypy/translator/c/src/asm_ppc.c b/pypy/translator/c/src/asm_ppc.c
new file mode 100644
--- /dev/null
+++ b/pypy/translator/c/src/asm_ppc.c
@@ -0,0 +1,22 @@
+#define __dcbst(base, index) \
+ __asm__ ("dcbst %0, %1" : /*no result*/ : "b%" (index), "r" (base) : "memory")
+#define __icbi(base, index) \
+ __asm__ ("icbi %0, %1" : /*no result*/ : "b%" (index), "r" (base) : "memory")
+#define __sync() __asm__ volatile ("sync")
+#define __isync() \
+ __asm__ volatile ("isync")
+
+void
+LL_flush_icache(long base, long size)
+{
+ long i;
+
+ for (i = 0; i < size; i += 32){
+ __dcbst(base, i);
+ }
+ __sync();
+ for (i = 0; i < size; i += 32){
+ __icbi(base, i);
+ }
+ __isync();
+}
diff --git a/pypy/translator/c/src/asm_ppc.h b/pypy/translator/c/src/asm_ppc.h
--- a/pypy/translator/c/src/asm_ppc.h
+++ b/pypy/translator/c/src/asm_ppc.h
@@ -1,29 +1,1 @@
-
void LL_flush_icache(long base, long size);
-
-#ifdef PYPY_MAIN_IMPLEMENTATION_FILE
-
-#define __dcbst(base, index) \
- __asm__ ("dcbst %0, %1" : /*no result*/ : "b%" (index), "r" (base) : "memory")
-#define __icbi(base, index) \
- __asm__ ("icbi %0, %1" : /*no result*/ : "b%" (index), "r" (base) : "memory")
-#define __sync() __asm__ volatile ("sync")
-#define __isync() \
- __asm__ volatile ("isync")
-
-void
-LL_flush_icache(long base, long size)
-{
- long i;
-
- for (i = 0; i < size; i += 32){
- __dcbst(base, i);
- }
- __sync();
- for (i = 0; i < size; i += 32){
- __icbi(base, i);
- }
- __isync();
-}
-
-#endif
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