[pypy-commit] pypy default: Add comments about memory barriers

[arigo]

Author: Armin Rigo <arigo at tunes.org>
Branch: 
Changeset: r73016:bf3e8fa831fd
Date: 2014-08-23 22:31 +0200
http://bitbucket.org/pypy/pypy/changeset/bf3e8fa831fd/

Log:	Add comments about memory barriers

diff --git a/rpython/jit/backend/x86/callbuilder.py b/rpython/jit/backend/x86/callbuilder.py
--- a/rpython/jit/backend/x86/callbuilder.py
+++ b/rpython/jit/backend/x86/callbuilder.py
@@ -164,6 +164,7 @@
             self.asm.set_extra_stack_depth(self.mc, -delta * WORD)
             css_value = eax
         #
+        # <--here--> would come a memory fence, if the CPU needed one.
         self.mc.MOV(heap(fastgil), css_value)
         #
         if not we_are_translated():        # for testing: we should not access
@@ -196,6 +197,8 @@
                 old_value = esi
             mc.LEA_rs(css_value.value, css)
         #
+        # Use XCHG as an atomic test-and-set-lock.  It also implicitly
+        # does a memory barrier.
         mc.MOV(old_value, imm(1))
         if rx86.fits_in_32bits(fastgil):
             mc.XCHG_rj(old_value.value, fastgil)