[pypy-commit] pypy vecopt: simplifications, added a x86_64 sse4 cpu

[plan_rich]

Author: Richard Plangger <rich at pasra.at>
Branch: vecopt
Changeset: r77291:9363d09e85dc
Date: 2015-05-11 11:08 +0200
http://bitbucket.org/pypy/pypy/changeset/9363d09e85dc/

Log:	simplifications, added a x86_64 sse4 cpu

diff --git a/rpython/jit/backend/detect_cpu.py b/rpython/jit/backend/detect_cpu.py
--- a/rpython/jit/backend/detect_cpu.py
+++ b/rpython/jit/backend/detect_cpu.py
@@ -13,6 +13,7 @@
 MODEL_X86         = 'x86'
 MODEL_X86_NO_SSE2 = 'x86-without-sse2'
 MODEL_X86_64      = 'x86-64'
+MODEL_X86_64_SSE4 = 'x86-64-sse4'
 MODEL_ARM         = 'arm'
 MODEL_PPC_64      = 'ppc-64'
 # don't use '_' in the model strings; they are replaced by '-'
@@ -69,18 +70,22 @@
         raise ProcessorAutodetectError, "unknown machine name %s" % mach
     #
     if result.startswith('x86'):
+        from rpython.jit.backend.x86 import detect_feature as feature
         if sys.maxint == 2**63-1:
             result = MODEL_X86_64
+            # has sse 2 at least
+            if feature.detect_sse4_1():
+                result = MODEL_X86_64_SSE4
         else:
             assert sys.maxint == 2**31-1
-            from rpython.jit.backend.x86 import detect_feature
-            if detect_feature.detect_sse2():
+            if feature.detect_sse2():
                 result = MODEL_X86
             else:
                 result = MODEL_X86_NO_SSE2
             if detect_feature.detect_x32_mode():
                 raise ProcessorAutodetectError(
                     'JITting in x32 mode is not implemented')
+
     #
     if result.startswith('arm'):
         from rpython.jit.backend.arm.detect import detect_float
@@ -108,6 +113,8 @@
         return "rpython.jit.backend.x86.runner", "CPU386_NO_SSE2"
     elif backend_name == MODEL_X86_64:
         return "rpython.jit.backend.x86.runner", "CPU_X86_64"
+    elif backend_name == MODEL_X86_64_SSE4:
+        return "rpython.jit.backend.x86.runner", "CPU_X86_64_SSE4"
     elif backend_name == MODEL_ARM:
         return "rpython.jit.backend.arm.runner", "CPU_ARM"
     else:
diff --git a/rpython/jit/backend/x86/detect_feature.py b/rpython/jit/backend/x86/detect_feature.py
--- a/rpython/jit/backend/x86/detect_feature.py
+++ b/rpython/jit/backend/x86/detect_feature.py
@@ -18,41 +18,32 @@
     code = cpu_id(eax=1)
     return bool(code & (1<<25)) and bool(code & (1<<26))
 
-def cpu_id(eax = 1, ret_edx=True, ret_ecx = False):
+def cpu_id(eax = 1, ret_edx = True, ret_ecx = False):
     asm = "\xB8" + struct.pack('I', eax) # MOV EAX, $eax
-    asm += "\x53"                     # PUSH EBX
-           "\x0F\xA2"                 # CPUID
-           "\x5B"                     # POP EBX
+    asm += ("\x53"                     # PUSH EBX
+            "\x0F\xA2"                 # CPUID
+            "\x5B"                     # POP EBX
+           )
     if ret_edx:
         asm += "\x92"                 # XCHG EAX, EDX
     elif ret_ecx:
         asm += "\x91"                 # XCHG EAX, ECX
     asm += "\xC3"                     # RET
-    #code = cpu_info("\xB8\x01\x00\x00\x00"     # MOV EAX, 1
-    #                "\x53"                     # PUSH EBX
-    #                "\x0F\xA2"                 # CPUID
-    #                "\x5B"                     # POP EBX
-    #                "\x92"                     # XCHG EAX, EDX
-    #                "\xC3"                     # RET
-    #               )
     return cpu_info(asm)
 
 def detect_sse4_1(code=-1):
-    """ use cpu_id_eax_1_ecx() to get code parameter """
     if code == -1:
-        code = cpu_id(eax=1, ret_edx=False, ret_ecx=False)
+        code = cpu_id(eax=1, ret_edx=False, ret_ecx=True)
     return bool(code & (1<<19))
 
 def detect_sse4_2(code=-1):
-    """ use cpu_id_eax_1_ecx() to get code parameter """
     if code == -1:
-        code = cpu_id(eax=1, ret_edx=False, ret_ecx=False)
+        code = cpu_id(eax=1, ret_edx=False, ret_ecx=True)
     return bool(code & (1<<20))
 
 def detect_sse4a(code=-1):
-    """ use cpu_id_eax_1_ecx() to get code parameter """
     if code == -1:
-        code = feature.cpu_id(eax=0x80000001, ret_edx=False, ret_ecx=True)
+        code = cpu_id(eax=0x80000001, ret_edx=False, ret_ecx=True)
     return bool(code & (1<<20))
 
 def detect_x32_mode():
@@ -67,8 +58,13 @@
 
 if __name__ == '__main__':
     if detect_sse2():
-        print 'Processor supports sse2.'
-    else:
-        print 'Missing processor support for sse2.'
+        print 'Processor supports sse2'
+    if detect_sse4_1():
+        print 'Processor supports sse4.1'
+    if detect_sse4_2():
+        print 'Processor supports sse4.2'
+    if detect_sse4a():
+        print 'Processor supports sse4a'
+
     if detect_x32_mode():
         print 'Process is running in "x32" mode.'
diff --git a/rpython/jit/backend/x86/runner.py b/rpython/jit/backend/x86/runner.py
--- a/rpython/jit/backend/x86/runner.py
+++ b/rpython/jit/backend/x86/runner.py
@@ -51,16 +51,6 @@
 
         self.profile_agent = profile_agent
 
-        if self.supports_floats and self.supports_longlong:
-            # has sse 2 at least
-            from rpython.jit.backend.x86 import detect_feature as feature
-            if feature.detect_sse4_1():
-                self.vector_extension = True
-                self.vector_register_size = 16
-                self.vector_horizontal_operations = True
-                if feature.detect_sse4a():
-                    self.vector_pack_slots = True
-
     def set_debug(self, flag):
         return self.assembler.set_debug(flag)
 
@@ -176,4 +166,9 @@
     IS_64_BIT = True
     HAS_CODEMAP = True
 
+class CPU_X86_64_SSE4(CPU_X86_64):
+    vector_extension = True
+    vector_register_size = 16
+    vector_horizontal_operations = True
+
 CPU = CPU386