[pypy-commit] pypy fix-longevity: (plan_rich, remi) support changing of register set for tests

[Raemi]

Author: Remi Meier <remi.meier at gmail.com>
Branch: fix-longevity
Changeset: r82499:851789a1560c
Date: 2016-02-25 13:56 +0100
http://bitbucket.org/pypy/pypy/changeset/851789a1560c/

Log:	(plan_rich,remi) support changing of register set for tests

diff --git a/rpython/jit/backend/llsupport/regalloc.py b/rpython/jit/backend/llsupport/regalloc.py
--- a/rpython/jit/backend/llsupport/regalloc.py
+++ b/rpython/jit/backend/llsupport/regalloc.py
@@ -318,7 +318,7 @@
 
     def update_free_registers(self, regs_in_use):
         # XXX: slow?
-        self._reset_free_regs()
+        self._reinit_free_regs()
         for r in regs_in_use:
             self.remove_free_register(r)
 
@@ -341,16 +341,22 @@
         return reg in self.free_callee_regs or \
                reg in self.free_caller_regs
 
-    def _reset_free_regs(self):
+    def _reinit_free_regs(self):
         self.free_callee_regs = [reg for reg in self.all_regs
                                  if reg not in self.save_around_call_regs]
         self.free_caller_regs = self.save_around_call_regs[:]
 
+    def _change_regs(self, all_regs, save_around_call_regs):
+        self.all_regs = all_regs
+        self.save_around_call_regs = save_around_call_regs
+        self._reinit_free_regs()
+        self.is_callee_lookup = [True] * max(
+            [r.value + 1 for r in self.all_regs])
+        for reg in save_around_call_regs:
+            self.is_callee_lookup[reg.value] = False
+
     def __init__(self, live_ranges, frame_manager=None, assembler=None):
-        self._reset_free_regs()
-        self.is_callee_lookup = [True] * len(self.all_regs)
-        for reg in self.save_around_call_regs:
-            self.is_callee_lookup[reg.value] = False
+        self._change_regs(self.all_regs, self.save_around_call_regs)
 
         self.live_ranges = live_ranges
         self.temp_boxes = []
diff --git a/rpython/jit/backend/llsupport/test/test_regalloc_call.py b/rpython/jit/backend/llsupport/test/test_regalloc_call.py
--- a/rpython/jit/backend/llsupport/test/test_regalloc_call.py
+++ b/rpython/jit/backend/llsupport/test/test_regalloc_call.py
@@ -117,15 +117,15 @@
             self.regalloc.rm.reg_bindings[var] = reg
 
         # instead of having all machine registers, we want only to provide some
-        fr = self.regalloc.free_regs
+        self.regalloc.rm._change_regs(self.regalloc.all_regs,
+                                      self.regalloc.caller_saved)
         if free_regs is None:
-            self.regalloc.rm.free_regs = [reg for reg in fr
-                                          if reg not in self.initial_binding.values()]
+            self.regalloc.rm.update_free_registers(
+                self.initial_binding.values())
         else:
-            self.regalloc.rm.free_regs = free_regs
-        self.regalloc.rm.all_regs = self.regalloc.all_regs
-        self.regalloc.rm.save_around_call_regs = self.regalloc.caller_saved
-
+            self.regalloc.rm.update_free_registers(
+                set(self.regalloc.all_regs) - set(free_regs))
+        self.regalloc.rm._check_invariants()
         # invoke the allocator!
         self.regalloc.walk_operations(inputargs, operations)