[pypy-dev] STM status

Armin Rigo arigo at tunes.org
Fri Feb 17 19:31:47 CET 2012


Hi all,

A negative update regarding HTM: from some sources, we can do the
educated guess that Intel's Haswell processor, released in 2013, will
have HTM --- at the level of the processor's L1 cache.  That means
that just a few kilobytes of memory can be part of a transaction's
read/write set.  Moreover there is no mecanism to tell the cpu "this
read/write needs not be tracked", so it has to record everything in
these few kilobytes.  So, bad news: it's very unlikely to be of any
use at all for the large-scale transactions I'm playing with.


A bientôt,

Armin.


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