[pypy-dev] GIL hacks in pypy
arigo at tunes.org
Sat Jan 14 12:29:17 CET 2012
On Fri, Jan 13, 2012 at 18:58, Timothy Baldridge <tbaldridge at gmail.com> wrote:
> Is the jitted code littered with cooperative "release-lock" instructions?
Yes: every compiled loop ends in (about 4-5) assembler instructions
that decrement the GIL counter and jump to some
release-and-reacquire-the-GIL code if it ends up negative. We don't
do it every loop, as it would have a performance impact.
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