[ANNOUNCE] MyHDL 0.5 released

Jan Decaluwe jan at jandecaluwe.com
Thu Jan 5 11:08:37 CET 2006

I'm pleased to announce the release of MyHDL 0.5.

MyHDL is an open-source package for using Python as a hardware
description and verification language. Moreover, it can convert
a design to Verilog. Thus, MyHDL provides a complete path
from Python to silicon.

For a complete overview, go here:

The manual is here:

To find out the details of what's new, go here:

Pythoneers may be interested in MyHDL's use of decorators:

You can download the release from SourceForge:

Best regards,

Jan Decaluwe

Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com
Losbergenlaan 16, B-3010 Leuven, Belgium
     From Python to silicon:

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