Forth like interpreter

[Samuel A. Falvo II]

In article <38CD96CD.AA96BD63 at cosc.canterbury.ac.nz>, Greg Ewing wrote:
>Two instructions? Far too much overhead! On a PDP11
>a Forth inner interpreter is just one instruction:

I hope you're being fecitious.  Besides, I was illustrating the point using
a processor environment that's actually still in use.  :-)  The least you
could have done was illustrate your point with the 68000:

	JMP	(A5)+

>Machine code words end with JMP INNER, and a
>threaded word looks like:

OK, so you're solution isn't any better than mine.  Essentially, the inner
interpretter becomes:

	JMP <next instruction>
	JMP (R5)+

Since the Intel solution inlines the NEXT routine (especially since it
greatly affects cache performance in a positive way), they take about the
same amount of time.  And in terms of clock cycles, I'm dead positive the
Intel solution is faster.

>SEMI:	MOV	(SP)+,R5
>	JMP	INNER

Your code lacks the code to push the old contents of R5 onto the stack,
although I may be missing something about the PDP11 instruction semantics.

Nonetheless, the point was proven.  I don't think processor wars benefit
this discussion at all.

-- 
KC5TJA/6, DM13, QRP-L #1447
Samuel A. Falvo II
Oceanside, CA