ANNOUNCE: MyHDL 0.1

[Paddy McCarthy]

Jan Decaluwe <jan at jandecaluwe.com> wrote in message news:<mailman.1047070861.23261.clpa-moderators at python.org>...
> I am happy to announce the initial public release of MyHDL, a
> Python package for using Python as a hardware description language.
> 
> This may be of interest to:
> - Pythoneers interested in applications of Python generators
> - hardware designers interested in the wonders of Python
> 
> You can find it at http://jandecaluwe.com/Tools/MyHDL/Overview.html.
> 



I should explain that I have been in Electronic Design and Electronic
Design Automation for too many decades. I've written CAD utilities as
well as supported Simulators for many years, (going back to the days
of Daisy-Mentor-Valid).

I had noticed various other HDL-as-part-of-scripting-language projects
such as Ruby and RHDL: http://www.eedesign.com/story/OEG20020807S0019
; Java: http://www.jhdl.org/ ; Perl:
http://search.cpan.org/author/GSLONDON/Hardware-Simulator-0000_0005/Simulator.pm.


There are also two SWIG wrappers for Python that allow Python to
interact with a simulator via the PLI:
http://www-cad.eecs.berkeley.edu/~pinhong/scriptEDA/ and
http://www.nelsim.com/index.html

I like MyHDL, its a good start, in a great language, but it is missing
a link to commercial simulators (via VPI and VHPI maybe)?

When I think of Verification scripting tools, features that come to
mind are constrained random generation of data, weighted random
generation, collection of coverage data, debugging environment, and
dynamic property checking.

MyHDL does have a long way to go but it is a start, and who knows -
maybe new ways of taming the verification explosion may appear if
people don't have to fight the Verification language itself.


P.S: A peak at the testbuilder C++ library:
http://www.testbuilder.net/ might prove inspirational.

P.P.S: Can anyone tell me if the CUDD package as packaged in PyCudd
can be used for constrained random generation of integers?


Thanks,  Pad.