SAGE for FPGA development

Blubaugh, David A. dblubaugh at belcan.com
Thu Feb 14 19:08:00 CET 2008


Bill,  


Let me first say that my FPGA experiences are of the following nature:

1.) Developed control algorithms onto a FPGA that were utilized to
control a switch-reluctance motor (three-phase as well six-phase).  

2.) I am currently in the process of developing a specialized
Multidimensional FFT processor that can be utilized to determine the
frequency content and angle of arrival of a target via a linear sensor
array.  

I believe that you are deeply mistaken about that I would be the only
person to use such a system.  The FPGA market will only increase as more
embedded systems utilize more and more FPGAs for the processing needs,
since embedded system are being task with more computationally intensive
tasks, such as for example, image digital signal processing within
portable digital cameras.  Electrical and Computer Engineers could start
to utilize SAGE for system programming and development, not just only
mathematicians or physicists doing their own selected work.

Also, I think that you may have the wrong idea of porting SAGE to be
executed within a FPGA.  What I had in mind was to have MyHDL embedded
within SAGE, where sage could handle the graphical plot outputs of what
is being generated by MyHDL.  To be absolutely clear, SAGE could be used
to handle the graphs for the simulation side of what the logic that is
being generated by MyHDL embedded within the SAGE framework.  This could
help in testing algorithms as they are being generated into verilog FPGA
logic, by having a graphical experience within the entire development
process.


If you have any more additional questions, please contact me as soon as
possible.  


Thanks,

David Blubaugh
    




 

-----Original Message-----
From: Bill Hart [mailto:goodwillhart at googlemail.com] 
Sent: Thursday, February 14, 2008 11:46 AM
To: Blubaugh, David A.
Cc: python-list at python.org; William Stein
Subject: Re: SAGE for FPGA development

David,

I see that if MyHDL was in SAGE, then it could be used to do what you
suggest. But why not get a python interpreter and still do what you
suggest. I don't see the advantage to putting it into SAGE. Who else
would use it? Is there a large group of mathematicians who have access
to FPGA hardware?

Also, you didn't answer my question about what expertise you have.

William Stein is the maintainer of SAGE, so he would be able to say more
about what fits with the design goals of SAGE, but my feeling is that
something would only be added to SAGE if it were going to benefit a
large base of its users (or bring a large base of users to SAGE). At
this point I only see one person who might potentially use this, i.e.
you.

Sorry to seem a little discouraging, but I need a little more
information to launch into a massive project to put FFT's onto FPGA's
for use in SAGE. I mean, can I reasonably afford an FPGA which would be
big enough for this and which I can put into my own home computer?
Is this the way of the future for mathematicians? Should we all be
buying these things? What is performance like on these things?

I *might* be interested, but I need to know a little more.

Bill.

On 14/02/2008, Blubaugh, David A. <dblubaugh at belcan.com> wrote:
> Bill,
>
>  The potential idea that I had in store for SAGE would be to first be

> able to develop complicated algorithms onto hardware.  What I mean by

> this is to take for example, a FFT and then be able to map the entire

> algorithm into hardware, in a reasonable amount of time.  It currently

> takes a few months to develop floating or fixed-point algorithms onto

> hardware. The idea behind this is that an algorithm would no longer be

> limited by a von-Neumann based architecture, which means that the  
> algorithm could theoretically process data as fast as the material
>  science of semiconductors will allow.   That would be the ultimate
goal.
>  I believe SAGE is more than capable to turn this into a reality, will

> the inclusion of MyHDL.  Are you interested in being apart of this  
> development??
>
>  Thanks,
>
>
>  David Blubaugh
>
>
>
>
>
>
>
>
>  -----Original Message-----
>  From: Bill Hart [mailto:goodwillhart at googlemail.com]
>
> Sent: Wednesday, February 13, 2008 7:45 PM
>  To: Blubaugh, David A.
>  Cc: William Stein
>  Subject: Re: Fwd: SAGE for FPGA development
>
>  Hi David,
>
>  I guess I don't know much about programming for FPGA's, though I know

> a  few people who do.
>
>  From what I can gather from the MyHDL website, the package allows one

> to  specify silicon using python (converting the python to verilog
code).
>  That seems like a powerful tool for designing silicon, but I can't 
> quite  see why one would put this in SAGE. Yes, one would then be able

> to  specify silicon circuits in SAGE, but that's not going to allow 
> SAGE to  run on FPGA's.
>
>  To make it useful, one would then need to modify some of the 
> underlying  packages in SAGE, such as GMP, so that they run through
the FPGA.
>  Alternatively, one would need to program specific fundamental SAGE  
> functions using MyHDL, then modify the higher level SAGE functions to

> call them if an FPGA was available.
>
>  So I guess my question is, if MyHDL were in SAGE, who would actually 
> use  it to specify silicon and then use that silicon functionality to 
> do  mathematics?
>
>  I note that you work for Belcan. Do you yourself have exertise in 
> using  MyHDL? What would you be able to contribute? Do you have a 
> particular  application in mind that you'd like to code for SAGE using
an FPGA?
>
>  I note that the MyHDL package is LGPL, which is a good thing.
>
>  Regards,
>
>  Bill Hart.
>
>
>  On 13/02/2008, Blubaugh, David A. <dblubaugh at belcan.com> wrote:
>  > Bill,
>  >
>  > Please ignore the security message.   The information on FPGAs is
that
>  they are more than capable of handling large algorithms, such as the

> multidimensional FFT.  I was wondering as to what would be required in

> order to combine MyHDL with Sage???  How would I go about this  
> combination becoming a reality???  Any help will be more than  
> appreciated.
>  >
>  >
>  > David
>  >
>  >
>  >
>  >
>  > -----Original Message-----
>  > From: Bill Hart [mailto:goodwillhart at googlemail.com]
>  > Sent: Monday, February 11, 2008 9:09 PM  > To: sage-devel  > Cc: 
> Blubaugh, David A.
>  > Subject: Re: Fwd: SAGE for FPGA development  >  > Dear David 
> Blubaugh,  >  > Unfortunately I already read your email before reading

> the security  > notice at the bottom. What should I do? ;-)  >  > But 
> seriously, regarding FPGA's, I'm somewhat out-of-touch with what  
> restrictions are placed on algorithms for FPGA's these days by readily

> available hardware. Do you have some up-to-date information on this?
>  >
>  > Perhaps supporting FPGA's should be the domain of something like 
> GMP  and other underlying numerical packages (or the SAGE versions of 
> such  packages). For example I can certainly imagine an FFT running on

> an FPGA  to multiply huge integers.
>  >
>  > Regards,
>  >
>  > Bill Hart.
>  >
>  >
>  >
>  > On 8 Feb, 01:20, "William Stein" <wst... at gmail.com> wrote:
>  > > ------- Forwarded message -------  > > From: "Blubaugh, David A."

> <dbluba... at belcan.com>  > > To: wst... at gmail.com  > >  > > Cc:
>  > > Subject: SAGE for FPGA development  > > Date: Thu, 07 Feb 2008 
> 14:26:13 -0800  > >  > > Sir,  > >  > > I was wondering if it was 
> possible to integrate MyHDL into SAGE???
>  > > This would hopefully allow for the development of a system that  
> > > could be utilized to develop numerical algorithms onto FPGAs.
>  > >
>  > > Thanks,
>  > >
>  > > David Blubaugh
>  > >
>  > > This e-mail transmission contains information that is
confidential
>  and may be privileged.   It is intended only for the addressee(s)
named
>  above. If you receive this e-mail in error, please do not read, copy 
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>  > >
>  > > --
>  > > William Stein
>  > > Associate Professor of Mathematics  > > University of 
> Washingtonhttp://wstein.org  >
>



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