greg.ewing at canterbury.ac.nz
Tue Apr 5 00:05:18 CEST 2011
geremy condra wrote:
> I'd be interested in seeing the performance impact of this, although I
> wonder if it'd be feasible.
A project I have in the back of my mind goes something
1) Design an instruction set for a Python machine and
a microcode architecture to support it
2) Write a simulator for it
3) Use the simulator to evaluate how effective it would
be if actually implemented, e.g. in an FPGA.
And if I get that far:
4) (optional) Get hold of a real FPGA and implement it
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